| /freebsd/contrib/llvm-project/llvm/include/llvm/IR/ |
| H A D | ConstrainedOps.def | 85 DAG_FUNCTION(lrint, 1, 1, experimental_constrained_lrint, LRINT)
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| H A D | VPIntrinsics.def | 476 VP_PROPERTY_FUNCTIONAL_SDOPC(LRINT)
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| /freebsd/contrib/llvm-project/llvm/include/llvm/CodeGen/ |
| H A D | ISDOpcodes.h | 996 LRINT, enumerator
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| H A D | BasicTTIImpl.h | 2055 ISD = ISD::LRINT; in getTypeBasedIntrinsicInstrCost()
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| /freebsd/contrib/llvm-project/llvm/lib/CodeGen/ |
| H A D | TargetLoweringBase.cpp | 771 ISD::SPLAT_VECTOR, ISD::LRINT, ISD::LLRINT, ISD::FTAN, ISD::FACOS, in initActions()
830 ISD::LROUND, ISD::LLROUND, ISD::LRINT, ISD::LLRINT, in initActions()
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| /freebsd/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | SelectionDAGDumper.cpp | 412 case ISD::LRINT: return "lrint"; in getOperationName()
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| H A D | LegalizeVectorTypes.cpp | 113 case ISD::LRINT: in ScalarizeVectorResult()
757 case ISD::LRINT: in ScalarizeVectorOperand()
1196 case ISD::LRINT: in SplitVectorResult()
3204 case ISD::LRINT: in SplitVectorOperand()
4522 case ISD::LRINT: in WidenVectorResult()
6392 case ISD::LRINT: in WidenVectorOperand()
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| H A D | LegalizeFloatTypes.cpp | 1018 case ISD::LRINT: Res = SoftenFloatOp_LRINT(N); break; in SoftenFloatOperand()
2085 case ISD::LRINT: Res = ExpandFloatOp_LRINT(N); break; in ExpandFloatOperand()
2412 case ISD::LRINT: in PromoteFloatOperand()
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| H A D | LegalizeVectorOps.cpp | 476 case ISD::LRINT: in LegalizeOp()
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| H A D | LegalizeIntegerTypes.cpp | 332 case ISD::LRINT: in PromoteIntegerResult()
2806 case ISD::LRINT: in ExpandIntegerResult()
3989 } else if (N->getOpcode() == ISD::LRINT || in ExpandIntRes_XROUND_XRINT()
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| H A D | LegalizeDAG.cpp | 1009 case ISD::LRINT: in LegalizeOp()
4721 case ISD::LRINT: in ConvertNodeToLibcall()
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| H A D | SelectionDAGBuilder.cpp | 6852 case Intrinsic::lrint: Opcode = ISD::LRINT; break; in visitIntrinsicCall()
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| H A D | SelectionDAG.cpp | 5424 case ISD::LRINT: in isKnownNeverNaN()
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| H A D | DAGCombiner.cpp | 1935 case ISD::LRINT: in visit()
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| /freebsd/contrib/llvm-project/llvm/include/llvm/Target/ |
| H A D | TargetSelectionDAG.td | 549 def lrint : SDNode<"ISD::LRINT" , SDTFPToIntOp>;
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| /freebsd/contrib/llvm-project/llvm/lib/Target/X86/ |
| H A D | X86ISelLowering.cpp | 316 setOperationAction(ISD::LRINT, MVT::f32, Custom); in X86TargetLowering()
317 setOperationAction(ISD::LRINT, MVT::f64, Custom); in X86TargetLowering()
322 setOperationAction(ISD::LRINT, MVT::i64, Custom); in X86TargetLowering()
854 setOperationAction(ISD::LRINT, MVT::f80, Custom); in X86TargetLowering()
1124 setOperationAction(ISD::LRINT, MVT::v4f32, Custom); in X86TargetLowering()
1455 setOperationAction(ISD::LRINT, MVT::v8f32, Custom); in X86TargetLowering()
1456 setOperationAction(ISD::LRINT, MVT::v4f64, Custom); in X86TargetLowering()
1760 setOperationAction(ISD::LRINT, VT, Legal); in X86TargetLowering()
1798 setOperationAction(ISD::LRINT, MVT::v16f32, in X86TargetLowering()
1800 setOperationAction(ISD::LRINT, MVT::v8f64, in X86TargetLowering()
[all …]
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| /freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/ |
| H A D | AArch64ISelLowering.cpp | 802 for (auto Op : {ISD::LROUND, ISD::LLROUND, ISD::LRINT, ISD::LLRINT, in AArch64TargetLowering()
868 ISD::LLROUND, ISD::LRINT, ISD::LLRINT, in AArch64TargetLowering()
1361 for (auto Op : {ISD::LRINT, ISD::LLRINT}) { in AArch64TargetLowering()
1604 setOperationAction(ISD::LRINT, VT, Custom); in AArch64TargetLowering()
2069 setOperationAction(ISD::LRINT, VT, Default); in addTypeForFixedLengthSVE()
7038 case ISD::LRINT: in LowerOperation()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/RISCV/ |
| H A D | RISCVISelLowering.cpp | 430 ISD::FMINNUM, ISD::FMAXNUM, ISD::LRINT, in RISCVTargetLowering()
975 setOperationAction({ISD::LRINT, ISD::LLRINT}, VT, Custom); in RISCVTargetLowering()
3277 // Expand vector LRINT and LLRINT by converting to the integer domain. in lowerVectorXRINT()
6079 case ISD::LRINT: in getRISCVVLOp()
6772 case ISD::LRINT: in LowerOperation()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/PowerPC/ |
| H A D | PPCISelLowering.cpp | 566 setOperationAction(ISD::LRINT, MVT::f64, Legal); in PPCTargetLowering()
567 setOperationAction(ISD::LRINT, MVT::f32, Legal); in PPCTargetLowering()
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