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Searched refs:LMUL_4 (Results 1 – 6 of 6) sorted by relevance

/freebsd/contrib/llvm-project/llvm/include/llvm/TargetParser/
H A DRISCVTargetParser.h76 LMUL_4, enumerator
/freebsd/contrib/llvm-project/llvm/lib/TargetParser/
H A DRISCVTargetParser.cpp189 case LMUL_4: in decodeVLMUL()
/freebsd/contrib/llvm-project/llvm/lib/Target/RISCV/MCA/
H A DRISCVCustomBehaviour.cpp134 case RISCVVType::LMUL_4: in createInstruments()
/freebsd/contrib/llvm-project/llvm/lib/Target/RISCV/
H A DRISCVISelDAGToDAG.cpp1896 CASE_VMSLT_OPCODES(LMUL_4, M4) in Select()
1914 CASE_VMNAND_VMSET_OPCODES(LMUL_4, B2) in Select()
1994 CASE_VMSLT_OPCODES(LMUL_4, M4) in Select()
2013 CASE_VMXOR_VMANDN_VMOR_OPCODES(LMUL_4, B2) in Select()
H A DRISCVInstrInfo.cpp421 return {RISCVVType::LMUL_4, RISCV::VRM4RegClass, RISCV::VMV4R_V, in copyPhysRegVector()
438 return {RISCVVType::LMUL_4, RISCV::VRM4RegClass, RISCV::VMV4R_V, in copyPhysRegVector()
H A DRISCVISelLowering.cpp2533 return RISCVVType::LMUL_4; in getLMUL()
2556 return RISCVVType::LMUL_4; in getLMUL()
2573 case RISCVVType::LMUL_4: in getRegClassIDForLMUL()
2593 if (LMUL == RISCVVType::LMUL_4) { in getSubregIndexByMVT()
4445 case RISCVVType::LMUL_4: in lowerBUILD_VECTOR()