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Searched refs:LMUL_4 (Results 1 – 6 of 6) sorted by relevance

/freebsd/contrib/llvm-project/llvm/include/llvm/TargetParser/
H A DRISCVTargetParser.h55 LMUL_4, enumerator
/freebsd/contrib/llvm-project/llvm/lib/TargetParser/
H A DRISCVTargetParser.cpp179 case RISCVII::VLMUL::LMUL_4: in decodeVLMUL()
/freebsd/contrib/llvm-project/llvm/lib/Target/RISCV/MCA/
H A DRISCVCustomBehaviour.cpp120 case RISCVII::LMUL_4: in createInstruments()
/freebsd/contrib/llvm-project/llvm/lib/Target/RISCV/
H A DRISCVISelDAGToDAG.cpp271 case RISCVII::VLMUL::LMUL_4: in createTuple()
1634 CASE_VMSLT_VMNAND_VMSET_OPCODES(LMUL_4, M4, B32) in Select()
1694 CASE_VMSLT_OPCODES(LMUL_4, M4, B32) in Select()
1713 CASE_VMXOR_VMANDN_VMOR_OPCODES(LMUL_4, M4) in Select()
3670 case RISCVII::LMUL_4: in GetVMSetForLMul()
H A DRISCVInstrInfo.cpp358 return {RISCVII::LMUL_4, RISCV::VRM4RegClass, RISCV::VMV4R_V, in copyPhysRegVector()
375 return {RISCVII::LMUL_4, RISCV::VRM4RegClass, RISCV::VMV4R_V, in copyPhysRegVector()
H A DRISCVISelLowering.cpp2469 return RISCVII::VLMUL::LMUL_4; in getLMUL()
2486 case RISCVII::VLMUL::LMUL_4: in getRegClassIDForLMUL()
2508 if (LMUL == RISCVII::VLMUL::LMUL_4) { in getSubregIndexByMVT()
4164 case RISCVII::VLMUL::LMUL_4: in lowerBUILD_VECTOR()