1 //===-- LanaiTargetMachine.cpp - Define TargetMachine for Lanai ---------===//
2 //
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6 //
7 //===----------------------------------------------------------------------===//
8 //
9 // Implements the info about Lanai target spec.
10 //
11 //===----------------------------------------------------------------------===//
12
13 #include "LanaiTargetMachine.h"
14
15 #include "Lanai.h"
16 #include "LanaiMachineFunctionInfo.h"
17 #include "LanaiTargetObjectFile.h"
18 #include "LanaiTargetTransformInfo.h"
19 #include "TargetInfo/LanaiTargetInfo.h"
20 #include "llvm/Analysis/TargetTransformInfo.h"
21 #include "llvm/CodeGen/Passes.h"
22 #include "llvm/CodeGen/TargetPassConfig.h"
23 #include "llvm/MC/TargetRegistry.h"
24 #include "llvm/Support/Compiler.h"
25 #include "llvm/Target/TargetOptions.h"
26 #include <optional>
27
28 using namespace llvm;
29
LLVMInitializeLanaiTarget()30 extern "C" LLVM_ABI LLVM_EXTERNAL_VISIBILITY void LLVMInitializeLanaiTarget() {
31 // Register the target.
32 RegisterTargetMachine<LanaiTargetMachine> registered_target(
33 getTheLanaiTarget());
34 PassRegistry &PR = *PassRegistry::getPassRegistry();
35 initializeLanaiAsmPrinterPass(PR);
36 initializeLanaiDAGToDAGISelLegacyPass(PR);
37 initializeLanaiMemAluCombinerPass(PR);
38 }
39
computeDataLayout()40 static std::string computeDataLayout() {
41 // Data layout (keep in sync with clang/lib/Basic/Targets.cpp)
42 return "E" // Big endian
43 "-m:e" // ELF name manging
44 "-p:32:32" // 32-bit pointers, 32 bit aligned
45 "-i64:64" // 64 bit integers, 64 bit aligned
46 "-a:0:32" // 32 bit alignment of objects of aggregate type
47 "-n32" // 32 bit native integer width
48 "-S64"; // 64 bit natural stack alignment
49 }
50
getEffectiveRelocModel(std::optional<Reloc::Model> RM)51 static Reloc::Model getEffectiveRelocModel(std::optional<Reloc::Model> RM) {
52 return RM.value_or(Reloc::PIC_);
53 }
54
LanaiTargetMachine(const Target & T,const Triple & TT,StringRef Cpu,StringRef FeatureString,const TargetOptions & Options,std::optional<Reloc::Model> RM,std::optional<CodeModel::Model> CodeModel,CodeGenOptLevel OptLevel,bool JIT)55 LanaiTargetMachine::LanaiTargetMachine(
56 const Target &T, const Triple &TT, StringRef Cpu, StringRef FeatureString,
57 const TargetOptions &Options, std::optional<Reloc::Model> RM,
58 std::optional<CodeModel::Model> CodeModel, CodeGenOptLevel OptLevel,
59 bool JIT)
60 : CodeGenTargetMachineImpl(
61 T, computeDataLayout(), TT, Cpu, FeatureString, Options,
62 getEffectiveRelocModel(RM),
63 getEffectiveCodeModel(CodeModel, CodeModel::Medium), OptLevel),
64 Subtarget(TT, Cpu, FeatureString, *this, Options, getCodeModel(),
65 OptLevel),
66 TLOF(new LanaiTargetObjectFile()) {
67 initAsmInfo();
68 }
69
70 TargetTransformInfo
getTargetTransformInfo(const Function & F) const71 LanaiTargetMachine::getTargetTransformInfo(const Function &F) const {
72 return TargetTransformInfo(std::make_unique<LanaiTTIImpl>(this, F));
73 }
74
createMachineFunctionInfo(BumpPtrAllocator & Allocator,const Function & F,const TargetSubtargetInfo * STI) const75 MachineFunctionInfo *LanaiTargetMachine::createMachineFunctionInfo(
76 BumpPtrAllocator &Allocator, const Function &F,
77 const TargetSubtargetInfo *STI) const {
78 return LanaiMachineFunctionInfo::create<LanaiMachineFunctionInfo>(Allocator,
79 F, STI);
80 }
81
82 namespace {
83 // Lanai Code Generator Pass Configuration Options.
84 class LanaiPassConfig : public TargetPassConfig {
85 public:
LanaiPassConfig(LanaiTargetMachine & TM,PassManagerBase * PassManager)86 LanaiPassConfig(LanaiTargetMachine &TM, PassManagerBase *PassManager)
87 : TargetPassConfig(TM, *PassManager) {}
88
getLanaiTargetMachine() const89 LanaiTargetMachine &getLanaiTargetMachine() const {
90 return getTM<LanaiTargetMachine>();
91 }
92
93 void addIRPasses() override;
94 bool addInstSelector() override;
95 void addPreSched2() override;
96 void addPreEmitPass() override;
97 };
98 } // namespace
99
100 TargetPassConfig *
createPassConfig(PassManagerBase & PassManager)101 LanaiTargetMachine::createPassConfig(PassManagerBase &PassManager) {
102 return new LanaiPassConfig(*this, &PassManager);
103 }
104
addIRPasses()105 void LanaiPassConfig::addIRPasses() {
106 addPass(createAtomicExpandLegacyPass());
107
108 TargetPassConfig::addIRPasses();
109 }
110
111 // Install an instruction selector pass.
addInstSelector()112 bool LanaiPassConfig::addInstSelector() {
113 addPass(createLanaiISelDag(getLanaiTargetMachine()));
114 return false;
115 }
116
117 // Implemented by targets that want to run passes immediately before
118 // machine code is emitted.
addPreEmitPass()119 void LanaiPassConfig::addPreEmitPass() {
120 addPass(createLanaiDelaySlotFillerPass(getLanaiTargetMachine()));
121 }
122
123 // Run passes after prolog-epilog insertion and before the second instruction
124 // scheduling pass.
addPreSched2()125 void LanaiPassConfig::addPreSched2() {
126 addPass(createLanaiMemAluCombinerPass());
127 }
128