/freebsd/contrib/llvm-project/llvm/include/llvm/IR/ |
H A D | ConstrainedOps.def | 86 DAG_FUNCTION(llrint, 1, 1, experimental_constrained_llrint, LLRINT)
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H A D | VPIntrinsics.def | 482 VP_PROPERTY_FUNCTIONAL_SDOPC(LLRINT)
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/freebsd/contrib/llvm-project/llvm/include/llvm/CodeGen/ |
H A D | ISDOpcodes.h | 997 LLRINT, enumerator
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H A D | BasicTTIImpl.h | 2058 ISD = ISD::LLRINT; in getTypeBasedIntrinsicInstrCost()
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/freebsd/contrib/llvm-project/llvm/lib/CodeGen/ |
H A D | TargetLoweringBase.cpp | 771 ISD::SPLAT_VECTOR, ISD::LRINT, ISD::LLRINT, ISD::FTAN, ISD::FACOS, in initActions() 830 ISD::LROUND, ISD::LLROUND, ISD::LRINT, ISD::LLRINT, in initActions()
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/freebsd/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/ |
H A D | SelectionDAGDumper.cpp | 414 case ISD::LLRINT: return "llrint"; in getOperationName()
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H A D | LegalizeVectorTypes.cpp | 114 case ISD::LLRINT: in ScalarizeVectorResult() 758 case ISD::LLRINT: in ScalarizeVectorOperand() 1198 case ISD::LLRINT: in SplitVectorResult() 3205 case ISD::LLRINT: in SplitVectorOperand() 4523 case ISD::LLRINT: in WidenVectorResult() 6393 case ISD::LLRINT: in WidenVectorOperand()
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H A D | LegalizeFloatTypes.cpp | 1020 case ISD::LLRINT: Res = SoftenFloatOp_LLRINT(N); break; in SoftenFloatOperand() 2086 case ISD::LLRINT: Res = ExpandFloatOp_LLRINT(N); break; in ExpandFloatOperand() 2413 case ISD::LLRINT: R = PromoteFloatOp_UnaryOp(N, OpNo); break; in PromoteFloatOperand()
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H A D | LegalizeVectorOps.cpp | 477 case ISD::LLRINT: in LegalizeOp()
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H A D | LegalizeIntegerTypes.cpp | 333 case ISD::LLRINT: in PromoteIntegerResult() 2810 case ISD::LLRINT: ExpandIntRes_XROUND_XRINT(N, Lo, Hi); break; in ExpandIntegerResult() 4015 } else if (N->getOpcode() == ISD::LLRINT || in ExpandIntRes_XROUND_XRINT()
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H A D | LegalizeDAG.cpp | 1010 case ISD::LLRINT: in LegalizeOp() 4728 case ISD::LLRINT: in ConvertNodeToLibcall()
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H A D | SelectionDAGBuilder.cpp | 6853 case Intrinsic::llrint: Opcode = ISD::LLRINT; break; in visitIntrinsicCall()
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H A D | SelectionDAG.cpp | 5425 case ISD::LLRINT: in isKnownNeverNaN()
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H A D | DAGCombiner.cpp | 1936 case ISD::LLRINT: return visitXRINT(N); in visit()
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/freebsd/contrib/llvm-project/llvm/include/llvm/Target/ |
H A D | TargetSelectionDAG.td | 550 def llrint : SDNode<"ISD::LLRINT" , SDTFPToIntOp>;
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/freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/ |
H A D | AArch64ISelLowering.cpp | 802 for (auto Op : {ISD::LROUND, ISD::LLROUND, ISD::LRINT, ISD::LLRINT, in AArch64TargetLowering() 868 ISD::LLROUND, ISD::LRINT, ISD::LLRINT, in AArch64TargetLowering() 1361 for (auto Op : {ISD::LRINT, ISD::LLRINT}) { in AArch64TargetLowering() 1605 setOperationAction(ISD::LLRINT, VT, Custom); in AArch64TargetLowering() 2070 setOperationAction(ISD::LLRINT, VT, Default); in addTypeForFixedLengthSVE() 7039 case ISD::LLRINT: in LowerOperation()
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/freebsd/contrib/llvm-project/llvm/lib/Target/RISCV/ |
H A D | RISCVISelLowering.cpp | 431 ISD::LLRINT, ISD::LROUND, ISD::LLROUND, in RISCVTargetLowering() 975 setOperationAction({ISD::LRINT, ISD::LLRINT}, VT, Custom); in RISCVTargetLowering() 3277 // Expand vector LRINT and LLRINT by converting to the integer domain. in lowerVectorXRINT() 6081 case ISD::LLRINT: in getRISCVVLOp() 6773 case ISD::LLRINT: in LowerOperation()
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/freebsd/contrib/llvm-project/llvm/lib/Target/X86/ |
H A D | X86ISelLowering.cpp | 318 setOperationAction(ISD::LLRINT, MVT::f32, Custom); in X86TargetLowering() 319 setOperationAction(ISD::LLRINT, MVT::f64, Custom); in X86TargetLowering() 323 setOperationAction(ISD::LLRINT, MVT::i64, Custom); in X86TargetLowering() 855 setOperationAction(ISD::LLRINT, MVT::f80, Custom); in X86TargetLowering() 1761 setOperationAction(ISD::LLRINT, VT, Legal); in X86TargetLowering() 1803 setOperationAction(ISD::LLRINT, MVT::v8f64, Legal); in X86TargetLowering() 2538 ISD::LLRINT, in X86TargetLowering() 32421 case ISD::LLRINT: return LowerLRINT_LLRINT(Op, DAG); in LowerOperation() 33133 case ISD::LLRINT: { in ReplaceNodeResults() 57804 case ISD::LLRINT: return combineLRINT_LLRINT(N, DAG, Subtarget); in PerformDAGCombine()
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/freebsd/contrib/llvm-project/llvm/lib/Target/PowerPC/ |
H A D | PPCISelLowering.cpp | 568 setOperationAction(ISD::LLRINT, MVT::f64, Legal); in PPCTargetLowering() 569 setOperationAction(ISD::LLRINT, MVT::f32, Legal); in PPCTargetLowering()
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