Searched refs:LHSMask (Results 1 – 5 of 5) sorted by relevance
/freebsd/contrib/llvm-project/llvm/lib/Transforms/InstCombine/ |
H A D | InstCombineAndOrXor.cpp | 453 unsigned LHSMask, unsigned RHSMask, InstCombiner::BuilderTy &Builder) { in foldLogOpOfMaskedICmpsAsymmetric() argument 462 LHSMask = conjugateICmpMask(LHSMask); in foldLogOpOfMaskedICmpsAsymmetric() 465 if ((LHSMask & Mask_NotAllZeros) && (RHSMask & BMask_Mixed)) { in foldLogOpOfMaskedICmpsAsymmetric() 471 } else if ((LHSMask & BMask_Mixed) && (RHSMask & Mask_NotAllZeros)) { in foldLogOpOfMaskedICmpsAsymmetric() 494 unsigned LHSMask = MaskPair->first; in foldLogOpOfMaskedICmps() local 496 unsigned Mask = LHSMask & RHSMask; in foldLogOpOfMaskedICmps() 501 LHS, RHS, IsAnd, A, B, C, D, E, PredL, PredR, LHSMask, RHSMask, in foldLogOpOfMaskedICmps()
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H A D | InstCombineVectorOps.cpp | 3091 ArrayRef<int> LHSMask; in visitShuffleVectorInst() local 3094 LHSMask = LHSShuffle->getShuffleMask(); in visitShuffleVectorInst() 3115 eltMask = LHSMask[Mask[i]]; in visitShuffleVectorInst() 3165 if (isSplat || newMask == LHSMask || newMask == RHSMask || newMask == Mask) { in visitShuffleVectorInst()
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/freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
H A D | SIISelLowering.cpp | 11644 uint32_t LHSMask = getPermuteMask(LHS); in performAndCombine() local 11646 if (LHSMask != ~0u && RHSMask != ~0u) { in performAndCombine() 11649 if (LHSMask > RHSMask) { in performAndCombine() 11650 std::swap(LHSMask, RHSMask); in performAndCombine() 11656 uint32_t LHSUsedLanes = ~(LHSMask & 0x0c0c0c0c) & 0x0c0c0c0c; in performAndCombine() 11669 uint32_t Mask = LHSMask & RHSMask; in performAndCombine() 11672 if ((LHSMask & ByteSel) == 0x0c || (RHSMask & ByteSel) == 0x0c) in performAndCombine() 12351 uint32_t LHSMask = getPermuteMask(LHS); in performOrCombine() local 12354 if (LHSMask != ~0u && RHSMask != ~0u) { in performOrCombine() 12357 if (LHSMask > RHSMask) { in performOrCombine() [all …]
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/freebsd/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/ |
H A D | DAGCombiner.cpp | 7711 const APInt &LHSMask = N0O1C->getAPIntValue(); in visitORLike() local 7714 if (DAG.MaskedValueIsZero(N0.getOperand(0), RHSMask&~LHSMask) && in visitORLike() 7715 DAG.MaskedValueIsZero(N1.getOperand(0), LHSMask&~RHSMask)) { in visitORLike() 7719 DAG.getConstant(LHSMask | RHSMask, DL, VT)); in visitORLike() 8430 SDValue LHSMask; // AND value if any. in MatchRotate() local 8431 matchRotateHalf(DAG, LHS, LHSShift, LHSMask); in MatchRotate() 8457 extractShiftForRotate(DAG, RHSShift, LHS, LHSMask, DL)) in MatchRotate() 8473 std::swap(LHSMask, RHSMask); in MatchRotate() 8493 if (LHSMask.getNode() || RHSMask.getNode()) { in MatchRotate() 8497 if (LHSMask.getNode()) { in MatchRotate() [all …]
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/freebsd/contrib/llvm-project/llvm/lib/Target/X86/ |
H A D | X86ISelLowering.cpp | 14728 int LHSMask[4] = {-1, -1, -1, -1}; in lowerShuffleAsLanePermuteAndSHUFP() local 14739 auto &LaneMask = (i & 1) ? RHSMask : LHSMask; in lowerShuffleAsLanePermuteAndSHUFP() 14744 SDValue LHS = DAG.getVectorShuffle(VT, DL, V1, V2, LHSMask); in lowerShuffleAsLanePermuteAndSHUFP() 45906 SmallVector<int, 64> LHSMask, RHSMask, CondMask; in combineSelect() local 45908 getTargetShuffleMask(LHS, true, LHSOps, LHSMask) && in combineSelect() 45915 LHSMask[i] = isUndefOrZero(LHSMask[i]) ? 0x80 : LHSMask[i]; in combineSelect() 45918 LHSMask[i] = 0x80; in combineSelect() 45923 getConstVector(LHSMask, SimpleVT, DAG, DL, true)); in combineSelect()
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