| /freebsd/contrib/llvm-project/llvm/lib/Transforms/InstCombine/ |
| H A D | InstCombineAndOrXor.cpp | 1409 Value *LHS0 = LHS->getOperand(0), *LHS1 = LHS->getOperand(1); in matchIsFiniteTest() local
1413 if (!matchIsNotNaN(PredL, LHS0, LHS1) || in matchIsFiniteTest()
1423 Value *LHS0 = LHS->getOperand(0), *LHS1 = LHS->getOperand(1); in foldLogicOfFCmps() local
1427 if (LHS0 == RHS1 && RHS0 == LHS1) { in foldLogicOfFCmps()
1447 if (LHS0 == RHS0 && LHS1 == RHS1) { in foldLogicOfFCmps()
1454 return getFCmpValue(NewPred, LHS0, LHS1, Builder, in foldLogicOfFCmps()
1463 if (LHS0->getType() != RHS0->getType()) in foldLogicOfFCmps()
1472 return Builder.CreateFCmpFMF(PredL, LHS0, RHS0, in foldLogicOfFCmps()
1479 stripSignOnlyFPOps(LHS0) == stripSignOnlyFPOps(RHS0)) { in foldLogicOfFCmps()
1498 fcmpToClassTest(PredL, *LHS->getFunction(), LHS0, LHS1); in foldLogicOfFCmps()
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| /freebsd/contrib/llvm-project/llvm/lib/Analysis/ |
| H A D | InstructionSimplify.cpp | 1817 Value *LHS0 = LHS->getOperand(0), *LHS1 = LHS->getOperand(1); in simplifyAndOrOfFCmps() local
1819 if (LHS0->getType() != RHS0->getType()) in simplifyAndOrOfFCmps()
1823 auto AbsOrSelfLHS0 = m_CombineOr(m_Specific(LHS0), m_FAbs(m_Specific(LHS0))); in simplifyAndOrOfFCmps()
1846 if ((match(LHS0, AbsOrSelfRHS0) || match(LHS1, AbsOrSelfRHS0)) && in simplifyAndOrOfFCmps()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/AVR/ |
| H A D | AVRISelLowering.cpp | 757 SDValue LHS0 = DAG.getNode(ISD::EXTRACT_ELEMENT, DL, MVT::i16, LHS_0, in getAVRCmp() local
786 Cmp = getAVRCmp(LHS0, RHS0, DAG, DL); in getAVRCmp()
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| /freebsd/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | DAGCombiner.cpp | 6547 SDValue LHS0 = LHS->getOperand(0); in foldAndOrOfSETCC() local
6558 EVT OpVT = LHS0.getValueType(); in foldAndOrOfSETCC()
6589 if (LHS0 == RHS0) { in foldAndOrOfSETCC()
6590 CommonValue = LHS0; in foldAndOrOfSETCC()
6596 Operand1 = LHS0; in foldAndOrOfSETCC()
6602 if (LHS0 == RHS1) { in foldAndOrOfSETCC()
6603 CommonValue = LHS0; in foldAndOrOfSETCC()
6609 Operand1 = LHS0; in foldAndOrOfSETCC()
6646 if (LHS0 == LHS1 && RHS0 == RHS1 && CCL == CCR && in foldAndOrOfSETCC()
6647 LHS0.getValueType() == RHS0.getValueType() && in foldAndOrOfSETCC()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/RISCV/ |
| H A D | RISCVISelLowering.cpp | 17972 SDValue LHS0 = LHS.getOperand(0); in performVP_TRUNCATECombine() local
17974 if (!FindAdd(LHS0, LHS1) && !FindAdd(LHS1, LHS0)) in performVP_TRUNCATECombine()
18356 const SDValue LHS0 = LHS.getOperand(0); in combine_CC() local
18357 if (isFoldableXorEq(LHS0, RHS) && isa<ConstantSDNode>(LHS0.getOperand(1))) { in combine_CC()
18360 LHS0.getOperand(1), LHS.getOperand(1)); in combine_CC()
18362 LHS0.getOperand(0), LHS.getOperand(1)); in combine_CC()
18370 SDValue LHS0 = LHS.getOperand(0); in combine_CC() local
18371 if (LHS0.getOpcode() == ISD::AND && in combine_CC()
18372 LHS0.getOperand(1).getOpcode() == ISD::Constant) { in combine_CC()
18373 uint64_t Mask = LHS0.getConstantOperandVal(1); in combine_CC()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
| H A D | AMDGPUISelLowering.cpp | 1114 auto *LHS0 = dyn_cast<LoadSDNode>(LHS.getOperand(0)); in isDesirableToCommuteWithShift() local
1116 return LHS0 && LHS1 && RHSLd && LHS0->getExtensionType() == ISD::ZEXTLOAD && in isDesirableToCommuteWithShift()
1117 LHS1->getAPIntValue() == LHS0->getMemoryVT().getScalarSizeInBits() && in isDesirableToCommuteWithShift()
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| /freebsd/contrib/llvm-project/llvm/lib/CodeGen/GlobalISel/ |
| H A D | CombinerHelper.cpp | 7510 Register LHS0 = Cmp1->getLHSReg(); in tryFoldLogicOfFCmps() local
7515 if (LHS0 == RHS1 && LHS1 == RHS0) { in tryFoldLogicOfFCmps()
7521 if (LHS0 == RHS0 && LHS1 == RHS1) { in tryFoldLogicOfFCmps()
7542 auto Cmp = B.buildFCmp(Pred, CmpTy, LHS0, LHS1, Flags); in tryFoldLogicOfFCmps()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/X86/ |
| H A D | X86ISelLowering.cpp | 50380 SDValue LHS0 = LHS.getOperand(0); in combineVectorHADDSUB() local
50384 if ((LHS0 == LHS1 || LHS0.isUndef() || LHS1.isUndef()) && in combineVectorHADDSUB()
50388 LHS0.isUndef() ? LHS1 : LHS0, in combineVectorHADDSUB()
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