Searched refs:KillMI (Results 1 – 4 of 4) sorted by relevance
921 MachineInstr *KillMI = nullptr; in rescheduleMIBelowKill() local933 KillMI = LIS->getInstructionFromIndex(I->end); in rescheduleMIBelowKill()935 KillMI = LV->getVarInfo(Reg).findKill(MBB); in rescheduleMIBelowKill()937 if (!KillMI || MI == KillMI || KillMI->isCopy() || KillMI->isCopyLike()) in rescheduleMIBelowKill()941 if (KillMI->hasUnmodeledSideEffects() || KillMI->isCall() || in rescheduleMIBelowKill()942 KillMI->isBranch() || KillMI->isTerminator()) in rescheduleMIBelowKill()947 if (isTwoAddrUse(*KillMI, Reg, DstReg)) in rescheduleMIBelowKill()991 MachineBasicBlock::iterator KillPos = KillMI; in rescheduleMIBelowKill()1031 assert((MOReg != Reg || &OtherMI == KillMI) && in rescheduleMIBelowKill()1064 LV->removeVirtualRegisterKilled(Reg, *KillMI); in rescheduleMIBelowKill()[all …]
125 if (MachineInstr *KillMI = RegKills[MBB->getNumber()].lookup(Reg)) { in clearKillsForDef() local126 KillMI->clearRegisterKills(Reg, TRI); in clearKillsForDef()
1131 if (MachineInstr *KillMI = LIS.getInstructionFromIndex(OldIdxIn->end)) in handleMoveDown() local1132 for (MachineOperand &MOP : mi_bundle_ops(*KillMI)) in handleMoveDown()1432 if (MachineInstr *KillMI = LIS.getInstructionFromIndex(NewIdx)) in handleMoveUp() local1433 for (MIBundleOperands MO(*KillMI); MO.isValid(); ++MO) in handleMoveUp()
2032 MachineBasicBlock::iterator KillMI = Br.MI; in optimizeThumb2Branches() local2035 --KillMI; in optimizeThumb2Branches()2036 if (KillMI->killsRegister(Reg, TRI)) { in optimizeThumb2Branches()2037 KillMI->clearRegisterKills(Reg, TRI); in optimizeThumb2Branches()2041 } while (KillMI != Cmp.MI); in optimizeThumb2Branches()