/freebsd/contrib/llvm-project/llvm/lib/Target/Hexagon/ |
H A D | HexagonPseudo.td | 37 A2_combineii.Itinerary, TypeALU32_2op>, OpcodeHexagon; 47 rootInst.Itinerary, rootInst.Type>, OpcodeHexagon { 74 [(set I1:$dst, 1)], "", C2_orn.Itinerary, TypeCR>; 79 [(set I1:$dst, 0)], "", C2_andn.Itinerary, TypeCR>; 116 [], "", rootInst.Itinerary, rootInst.Type>, OpcodeHexagon { 136 [], "", rootInst.Itinerary, rootInst.Type>, OpcodeHexagon { 166 "call " # ExtStr # "$dst", [], "", J2_call.Itinerary, TypeJ>, 210 "callr $Rs", [], "", J2_callr.Itinerary, TypeJ>, OpcodeHexagon { 232 let Itinerary = itin; 235 def PS_call_nr : Call_nr<24, 0, (ins s32_0Imm:$Ii), J2_call.Itinerary>; [all …]
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H A D | HexagonSchedule.td | 47 // Itinerary classes.
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H A D | HexagonInstrFormats.td | 60 let Itinerary = itin; 287 let Itinerary = DUPLEX;
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/freebsd/contrib/llvm-project/llvm/utils/TableGen/ |
H A D | DFAPacketizerEmitter.cpp | 81 ResourceVector getResourcesForItinerary(Record *Itinerary); 177 DFAPacketizerEmitter::getResourcesForItinerary(Record *Itinerary) { in getResourcesForItinerary() argument 179 assert(Itinerary); in getResourcesForItinerary() 180 for (Record *StageDef : Itinerary->getValueAsListOfDefs("Stages")) { in getResourcesForItinerary() 194 for (Record *Itinerary : Itineraries) { in createScheduleClasses() 195 if (!Itinerary) { in createScheduleClasses() 199 ResourceVector Resources = getResourcesForItinerary(Itinerary); in createScheduleClasses()
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/freebsd/contrib/llvm-project/llvm/lib/Target/Mips/ |
H A D | Mips32r6InstrInfo.td | 221 InstrItinClass Itinerary = Itin; 324 InstrItinClass Itinerary = itin; 338 InstrItinClass Itinerary = itin; 350 InstrItinClass Itinerary = itin; 363 InstrItinClass Itinerary = itin; 381 InstrItinClass Itinerary = II_BC; 398 InstrItinClass Itinerary = II_BCCC; 410 InstrItinClass Itinerary = II_BCCZC; 422 InstrItinClass Itinerary = II_BCCZC; 443 InstrItinClass Itinerary = II_BALC; [all …]
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H A D | MipsEVAInstrInfo.td | 63 InstrItinClass Itinerary = itin; 81 InstrItinClass Itinerary = itin; 99 InstrItinClass Itinerary = itin; 115 InstrItinClass Itinerary = itin; 133 InstrItinClass Itinerary = itin; 148 InstrItinClass Itinerary = itin; 158 InstrItinClass Itinerary = itin; 176 InstrItinClass Itinerary = itin;
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H A D | MicroMips32r6InstrInfo.td | 283 InstrItinClass Itinerary = II_BCCZC; 331 InstrItinClass Itinerary = II_BCCC; 362 InstrItinClass Itinerary = Itin; 405 InstrItinClass Itinerary = II_BITSWAP; 420 InstrItinClass Itinerary = Itin; 434 InstrItinClass Itinerary = Itin; 445 InstrItinClass Itinerary = Itin; 479 InstrItinClass Itinerary = Itin; 522 InstrItinClass Itinerary = Itin; 534 InstrItinClass Itinerary = Itin; [all …]
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H A D | MipsMTInstrInfo.td | 49 InstrItinClass Itinerary = Itin; 57 InstrItinClass Itinerary = II_MFTR; 65 InstrItinClass Itinerary = II_MTTR; 73 InstrItinClass Itinerary = II_FORK; 81 InstrItinClass Itinerary = II_YIELD;
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H A D | MicroMipsDSPInstrInfo.td | 186 InstrItinClass Itinerary = itin; 222 InstrItinClass Itinerary = itin; 258 InstrItinClass Itinerary = itin; 288 InstrItinClass Itinerary = NoItinerary; 294 InstrItinClass Itinerary = NoItinerary; 331 InstrItinClass Itinerary = itin; 344 InstrItinClass Itinerary = NoItinerary; 353 InstrItinClass Itinerary = NoItinerary; 361 InstrItinClass Itinerary = NoItinerary; 376 InstrItinClass Itinerary = NoItinerary; [all …]
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H A D | MipsDSPInstrInfo.td | 273 InstrItinClass Itinerary = itin; 284 InstrItinClass Itinerary = itin; 295 InstrItinClass Itinerary = itin; 306 InstrItinClass Itinerary = itin; 317 InstrItinClass Itinerary = itin; 329 InstrItinClass Itinerary = itin; 340 InstrItinClass Itinerary = itin; 350 InstrItinClass Itinerary = itin; 361 InstrItinClass Itinerary = itin; 372 InstrItinClass Itinerary = itin; [all …]
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H A D | MipsMSAInstrInfo.td | 1126 InstrItinClass Itinerary = itin; 1137 InstrItinClass Itinerary = itin; 1148 InstrItinClass Itinerary = itin; 1159 InstrItinClass Itinerary = itin; 1170 InstrItinClass Itinerary = itin; 1186 InstrItinClass Itinerary = itin; 1210 InstrItinClass Itinerary = itin; 1221 InstrItinClass Itinerary = itin; 1234 InstrItinClass Itinerary = itin; 1254 InstrItinClass Itinerary = itin; [all …]
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H A D | Mips64r6InstrInfo.td | 57 InstrItinClass Itinerary = itin; 119 InstrItinClass Itinerary = II_JR_HB;
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H A D | Mips16InstrFormats.td | 46 let Itinerary = itin;
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H A D | MicroMipsInstrFormats.td | 32 let Itinerary = itin;
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/freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
H A D | R600Instructions.td | 1017 let Itinerary = VecALU; 1024 let Itinerary = VecALU; 1095 let Itinerary = TransALU; 1101 let Itinerary = TransALU; 1107 let Itinerary = TransALU; 1113 let Itinerary = TransALU; 1119 let Itinerary = TransALU; 1129 let Itinerary = TransALU; 1137 let Itinerary = TransALU; 1142 let Itinerary [all...] |
H A D | R600InstrFormats.td | 48 let Itinerary = itin;
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H A D | AMDGPUInstructions.td | 37 let Itinerary = NullALU; 70 let Itinerary = NullALU;
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/freebsd/contrib/llvm-project/llvm/lib/Target/Lanai/ |
H A D | LanaiInstrFormats.td | 89 let Itinerary = IIC_ALU; 149 let Itinerary = IIC_ALU; 329 let Itinerary = IIC_ALU; 392 let Itinerary = IIC_ALU; 542 let Itinerary = IIC_ALU;
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H A D | LanaiInstrInfo.td | 502 let Itinerary = IIC_LD; 548 let Itinerary = IIC_LD; 561 let Itinerary = IIC_LDSW; 604 let Itinerary = IIC_ST; 621 let Itinerary = IIC_ST; 647 let Itinerary = IIC_ST; 660 let Itinerary = IIC_STSW;
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/freebsd/contrib/llvm-project/llvm/lib/Target/PowerPC/ |
H A D | PPCSchedule.td | 10 // Instruction Itinerary classes used for PowerPC
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/freebsd/contrib/llvm-project/llvm/lib/Target/Xtensa/ |
H A D | XtensaInstrFormats.td | 24 let Itinerary = itin;
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/freebsd/contrib/llvm-project/llvm/include/llvm/Target/ |
H A D | TargetItinerary.td | 1 //===- TargetItinerary.td - Target Itinerary Description --*- tablegen -*-====//
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/freebsd/contrib/llvm-project/llvm/lib/Target/M68k/ |
H A D | M68kInstrFormats.td | 229 let Itinerary = itin;
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/freebsd/contrib/llvm-project/llvm/lib/Target/Sparc/ |
H A D | SparcInstrFormats.td | 28 let Itinerary = itin;
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/freebsd/contrib/llvm-project/llvm/lib/Target/ARM/ |
H A D | ARMSchedule.td | 210 // Instruction Itinerary classes used for ARM
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