| /freebsd/contrib/llvm-project/llvm/lib/Target/Mips/ |
| H A D | MicroMips32r6InstrInfo.td | 356 class BC_MMR6_DESC_BASE<string instr_asm, DAGOperand opnd, InstrItinClass Itin>
362 InstrItinClass Itinerary = Itin;
413 InstrItinClass Itin>
420 InstrItinClass Itinerary = Itin;
427 RegisterOperand GPROpnd, InstrItinClass Itin>
434 InstrItinClass Itinerary = Itin;
441 InstrItinClass Itin> : MMR6Arch<instr_asm> {
445 InstrItinClass Itinerary = Itin;
472 InstrItinClass Itin>
479 InstrItinClass Itinerary = Itin;
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| H A D | MipsInstrFPU.td | 111 class ADDS_FT<string opstr, RegisterOperand RC, InstrItinClass Itin, bit IsComm,
115 [(set RC:$fd, (OpNode RC:$fs, RC:$ft))], Itin, FrmFR, opstr>,
120 multiclass ADDS_M<string opstr, InstrItinClass Itin, bit IsComm,
122 def _D32 : MMRel, ADDS_FT<opstr, AFGR64Opnd, Itin, IsComm, OpNode>, FGR_32;
123 def _D64 : ADDS_FT<opstr, FGR64Opnd, Itin, IsComm, OpNode>, FGR_64 {
129 InstrItinClass Itin, SDPatternOperator OpNode= null_frag> :
131 [(set DstRC:$fd, (OpNode SrcRC:$fs))], Itin, FrmFR, opstr>,
136 InstrItinClass Itin, bit IsComm,
140 [(set DstRC:$fd, (OpNode SrcRC:$fs, SrcRC:$ft))], Itin, FrmFR, opstr>,
145 multiclass ABSS_M<string opstr, InstrItinClass Itin,
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| H A D | MicroMipsInstrInfo.td | 214 Operand MemOpnd, InstrItinClass Itin> :
218 Itin, FrmI> {
227 Operand MemOpnd, InstrItinClass Itin>:
230 [(OpNode RO:$rt, addrimm12:$addr)], Itin, FrmI> {
296 InstrItinClass Itin = NoItinerary, DAGOperand MO = mem_mm_12> :
299 [(set RO:$rt, (OpNode addrimm12:$addr))], Itin, FrmI, opstr> {
306 InstrItinClass Itin = NoItinerary,
310 [(set RO:$rd, (OpNode RO:$rs, RO:$rt))], Itin, FrmR> {
315 InstrItinClass Itin = NoItinerary> :
317 !strconcat(opstr, "\t$rd, $rs, $imm"), [], Itin, FrmI>;
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| H A D | MipsCondMov.td | 19 InstrItinClass Itin> :
21 !strconcat(opstr, "\t$rd, $rs, $rt"), [], Itin, FrmFR, opstr> {
27 InstrItinClass Itin> :
29 !strconcat(opstr, "\t$fd, $fs, $rt"), [], Itin, FrmFR, opstr>,
35 class CMov_F_I_FT<string opstr, RegisterOperand RC, InstrItinClass Itin,
40 Itin, FrmFR, opstr>, HARDFLOAT {
45 class CMov_F_F_FT<string opstr, RegisterOperand RC, InstrItinClass Itin,
50 Itin, FrmFR, opstr>, HARDFLOAT {
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| H A D | Mips32r6InstrInfo.td | 214 InstrItinClass Itin,
221 InstrItinClass Itinerary = Itin;
225 RegisterOperand FGROpnd, InstrItinClass Itin>{
228 CMP_CONDN_DESC_BASE<"af", Typestr, FGROpnd, Itin>,
232 CMP_CONDN_DESC_BASE<"un", Typestr, FGROpnd, Itin, setuo>,
236 CMP_CONDN_DESC_BASE<"eq", Typestr, FGROpnd, Itin,
242 CMP_CONDN_DESC_BASE<"ueq", Typestr, FGROpnd, Itin,
247 CMP_CONDN_DESC_BASE<"lt", Typestr, FGROpnd, Itin,
253 CMP_CONDN_DESC_BASE<"ult", Typestr, FGROpnd, Itin,
258 CMP_CONDN_DESC_BASE<"le", Typestr, FGROpnd, Itin,
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| H A D | MicroMipsInstrFPU.td | 13 multiclass ADDS_MMM<string opstr, InstrItinClass Itin, bit IsComm,
15 def _D32_MM : MMRel, ADDS_FT<opstr, AFGR64Opnd, Itin, IsComm, OpNode>,
20 def _D64_MM : ADDS_FT<opstr, FGR64Opnd, Itin, IsComm, OpNode>, FGR_64 {
110 multiclass ABSS_MMM<string opstr, InstrItinClass Itin,
112 def _D32_MM : MMRel, ABSS_FT<opstr, AFGR64Opnd, AFGR64Opnd, Itin, OpNode>,
116 def _D64_MM : StdMMR6Rel, ABSS_FT<opstr, FGR64Opnd, FGR64Opnd, Itin, OpNode>,
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| H A D | MipsMTInstrInfo.td | 44 class MT_1R_DESC_BASE<string instr_asm, InstrItinClass Itin = NoItinerary> {
49 InstrItinClass Itinerary = Itin;
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| H A D | MipsInstrInfo.td | 1319 InstrItinClass Itin = NoItinerary,
1323 [(set RO:$rd, (OpNode RO:$rs, RO:$rt))], Itin, FrmR, opstr> {
1331 InstrItinClass Itin = NoItinerary,
1337 Itin, FrmI, opstr> {
1388 InstrItinClass Itin = NoItinerary,
1391 [(set RO:$rt, (OpNode Addr:$addr))], Itin, FrmI, opstr> {
1399 InstrItinClass Itin = NoItinerary, ComplexPattern Addr = addr> :
1400 LoadMemory<opstr, RO, mem, OpNode, Itin, Addr>;
1404 InstrItinClass Itin = NoItinerary, ComplexPattern Addr = addr> :
1406 [(OpNode RO:$rt, Addr:$addr)], Itin, FrmI, opstr> {
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| /freebsd/contrib/llvm-project/llvm/lib/CodeGen/ |
| H A D | VLIWMachineScheduler.cpp | 279 const InstrItineraryData *Itin = DAG->getSchedModel()->getInstrItineraries(); in initialize() local
284 Top.HazardRec = TII->CreateTargetMIHazardRecognizer(Itin, DAG); in initialize()
285 Bot.HazardRec = TII->CreateTargetMIHazardRecognizer(Itin, DAG); in initialize()
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| H A D | MachineScheduler.cpp | 3266 const InstrItineraryData *Itin = SchedModel->getInstrItineraries(); in initialize() local
3268 Top.HazardRec = DAG->TII->CreateTargetMIHazardRecognizer(Itin, DAG); in initialize()
3271 Bot.HazardRec = DAG->TII->CreateTargetMIHazardRecognizer(Itin, DAG); in initialize()
3893 const InstrItineraryData *Itin = SchedModel->getInstrItineraries(); in initialize() local
3895 Top.HazardRec = DAG->TII->CreateTargetMIHazardRecognizer(Itin, DAG); in initialize()
3898 Bot.HazardRec = DAG->TII->CreateTargetMIHazardRecognizer(Itin, DAG); in initialize()
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