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Searched refs:IsaInfo (Results 1 – 17 of 17) sorted by relevance

/freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/
H A DGCNSubtarget.h64 AMDGPU::IsaInfo::AMDGPUTargetID TargetID;
333 const AMDGPU::IsaInfo::AMDGPUTargetID &getTargetID() const { in getTargetID()
1498 return AMDGPU::IsaInfo::getSGPRAllocGranule(this); in getSGPRAllocGranule()
1503 return AMDGPU::IsaInfo::getSGPREncodingGranule(this); in getSGPREncodingGranule()
1508 return AMDGPU::IsaInfo::getTotalNumSGPRs(this); in getTotalNumSGPRs()
1513 return AMDGPU::IsaInfo::getAddressableNumSGPRs(this); in getAddressableNumSGPRs()
1519 return AMDGPU::IsaInfo::getMinNumSGPRs(this, WavesPerEU); in getMinNumSGPRs()
1525 return AMDGPU::IsaInfo::getMaxNumSGPRs(this, WavesPerEU, Addressable); in getMaxNumSGPRs()
1571 return AMDGPU::IsaInfo::getVGPRAllocGranule(this, DynamicVGPRBlockSize); in getVGPRAllocGranule()
1576 return AMDGPU::IsaInfo::getVGPREncodingGranule(this); in getVGPREncodingGranule()
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H A DR600Subtarget.h136 return AMDGPU::IsaInfo::getMaxWorkGroupsPerCU(this, FlatWorkGroupSize); in getMaxWorkGroupsPerCU()
141 return AMDGPU::IsaInfo::getMinFlatWorkGroupSize(this); in getMinFlatWorkGroupSize()
146 return AMDGPU::IsaInfo::getMaxFlatWorkGroupSize(this); in getMaxFlatWorkGroupSize()
153 return AMDGPU::IsaInfo::getWavesPerEUForWorkGroup(this, FlatWorkGroupSize); in getWavesPerEUForWorkGroup()
159 return AMDGPU::IsaInfo::getMinWavesPerEU(this); in getMinWavesPerEU()
H A DAMDGPUHSAMetadataStreamer.h39 namespace IsaInfo {
52 const IsaInfo::AMDGPUTargetID &TargetID) = 0;
99 void emitTargetID(const IsaInfo::AMDGPUTargetID &TargetID);
139 const IsaInfo::AMDGPUTargetID &TargetID) override;
H A DGCNSubtarget.cpp182 MaxWavesPerEU = AMDGPU::IsaInfo::getMaxWavesPerEU(this); in GCNSubtarget()
183 EUsPerCU = AMDGPU::IsaInfo::getEUsPerCU(this); in GCNSubtarget()
365 return AMDGPU::IsaInfo::getOccupancyWithNumSGPRs(SGPRs, getMaxWavesPerEU(), in getOccupancyWithNumSGPRs()
372 return AMDGPU::IsaInfo::getNumWavesPerEUWithNumVGPRs(this, NumVGPRs, in getOccupancyWithNumVGPRs()
466 MaxNumSGPRs = AMDGPU::IsaInfo::FIXED_NUM_SGPRS_FOR_INIT_BUG; in getBaseMaxNumSGPRs()
H A DAMDGPUAsmPrinter.cpp181 FunctionTargetID.getXnackSetting() != IsaInfo::TargetIDSetting::Any && in emitFunctionBodyStart()
190 FunctionTargetID.getSramEccSetting() != IsaInfo::TargetIDSetting::Any && in emitFunctionBodyStart()
424 NumSgpr += IsaInfo::getNumExtraSGPRs( in validateMCResourceInfo()
890 const IsaInfo::AMDGPUTargetID &STMTargetID = STM.getTargetID(); in initializeTargetID()
892 if (TSTargetID->getXnackSetting() == IsaInfo::TargetIDSetting::Any) in initializeTargetID()
895 if (TSTargetID->getSramEccSetting() == IsaInfo::TargetIDSetting::Any) in initializeTargetID()
1110 CreateExpr(AMDGPU::IsaInfo::FIXED_NUM_SGPRS_FOR_INIT_BUG); in getSIProgramInfo()
1112 CreateExpr(AMDGPU::IsaInfo::FIXED_NUM_SGPRS_FOR_INIT_BUG); in getSIProgramInfo()
1147 IsaInfo::getSGPREncodingGranule(&STM)); in getSIProgramInfo()
1149 IsaInfo::getVGPREncodingGranule(&STM)); in getSIProgramInfo()
H A DAMDGPUHSAMetadataStreamer.cpp219 const IsaInfo::AMDGPUTargetID &TargetID) { in emitTargetID()
562 const IsaInfo::AMDGPUTargetID &TargetID) { in begin()
H A DGCNSchedStrategy.cpp113 AMDGPU::IsaInfo::getVGPRAllocGranule(&ST, DynamicVGPRBlockSize); in initialize()
115 AMDGPU::IsaInfo::getAddressableNumVGPRs(&ST, DynamicVGPRBlockSize); in initialize()
1473 unsigned BlocksBefore = AMDGPU::IsaInfo::getAllocatedNumVGPRBlocks( in shouldRevertScheduling()
1476 unsigned BlocksAfter = AMDGPU::IsaInfo::getAllocatedNumVGPRBlocks( in shouldRevertScheduling()
H A DGCNRegPressure.h58 return alignTo(NumArchVGPRs, AMDGPU::IsaInfo::getArchVGPRAllocGranule()) + in getUnifiedVGPRNum()
H A DSIFrameLowering.cpp719 AMDGPU::IsaInfo::getVGPRAllocGranule(&ST, in emitEntryFunctionPrologue()
H A DSIInsertWaitcnts.cpp2951 AMDGPU::IsaInfo::getMaxWavesPerEU(ST))) { in run()
/freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/MCTargetDesc/
H A DAMDGPUTargetStreamer.h36 std::optional<AMDGPU::IsaInfo::AMDGPUTargetID> TargetID;
109 const std::optional<AMDGPU::IsaInfo::AMDGPUTargetID> &getTargetID() const { in getTargetID()
112 std::optional<AMDGPU::IsaInfo::AMDGPUTargetID> &getTargetID() { in getTargetID()
H A DAMDGPUTargetStreamer.cpp786 case AMDGPU::IsaInfo::TargetIDSetting::Unsupported: in getEFlagsV4()
789 case AMDGPU::IsaInfo::TargetIDSetting::Any: in getEFlagsV4()
792 case AMDGPU::IsaInfo::TargetIDSetting::Off: in getEFlagsV4()
795 case AMDGPU::IsaInfo::TargetIDSetting::On: in getEFlagsV4()
801 case AMDGPU::IsaInfo::TargetIDSetting::Unsupported: in getEFlagsV4()
804 case AMDGPU::IsaInfo::TargetIDSetting::Any: in getEFlagsV4()
807 case AMDGPU::IsaInfo::TargetIDSetting::Off: in getEFlagsV4()
810 case AMDGPU::IsaInfo::TargetIDSetting::On: in getEFlagsV4()
H A DAMDGPUMCExpr.cpp121 uint64_t ExtraSGPRs = IsaInfo::getNumExtraSGPRs( in evaluateExtraSGPRs()
205 Occupancy, IsaInfo::getOccupancyWithNumSGPRs( in evaluateOccupancy()
210 IsaInfo::getNumWavesPerEUWithNumVGPRs( in evaluateOccupancy()
319 unsigned MaxWaves = IsaInfo::getMaxWavesPerEU(&STM); in createOccupancy()
320 unsigned Granule = IsaInfo::getVGPRAllocGranule(&STM, DynamicVGPRBlockSize); in createOccupancy()
321 unsigned TargetTotalNumVGPRs = IsaInfo::getTotalNumVGPRs(&STM); in createOccupancy()
/freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/Utils/
H A DAMDGPUBaseInfo.cpp967 namespace IsaInfo { namespace
3228 const AMDGPU::IsaInfo::TargetIDSetting S) { in operator <<()
3230 case (AMDGPU::IsaInfo::TargetIDSetting::Unsupported): in operator <<()
3233 case (AMDGPU::IsaInfo::TargetIDSetting::Any): in operator <<()
3236 case (AMDGPU::IsaInfo::TargetIDSetting::Off): in operator <<()
3239 case (AMDGPU::IsaInfo::TargetIDSetting::On): in operator <<()
H A DAMDGPUBaseInfo.h134 namespace IsaInfo {
1750 const AMDGPU::IsaInfo::TargetIDSetting S);
/freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/Disassembler/
H A DAMDGPUDisassembler.cpp2166 AMDGPU::IsaInfo::getVGPREncodingGranule(&STI, EnableWavefrontSize32); in decodeCOMPUTE_PGM_RSRC1()
2197 AMDGPU::IsaInfo::getSGPREncodingGranule(&STI); in decodeCOMPUTE_PGM_RSRC1()
/freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/AsmParser/
H A DAMDGPUAsmParser.cpp5743 IsaInfo::getAddressableNumSGPRs(&getSTI()); in calculateGPRBlocks()
5761 MCConstantExpr::create(IsaInfo::FIXED_NUM_SGPRS_FOR_INIT_BUG, Ctx); in calculateGPRBlocks()
5781 IsaInfo::getVGPREncodingGranule(&getSTI(), EnableWavefrontSize32)); in calculateGPRBlocks()
5783 GetNumGPRBlocks(NumSGPRs, IsaInfo::getSGPREncodingGranule(&getSTI())); in calculateGPRBlocks()
6508 unsigned LocalMemorySize = AMDGPU::IsaInfo::getLocalMemorySize(&getSTI()); in ParseDirectiveAMDGPULDS()