Home
last modified time | relevance | path

Searched refs:IsZeroExt (Results 1 – 4 of 4) sorted by relevance

/freebsd/contrib/llvm-project/llvm/lib/Target/Hexagon/
H A DHexagonISelDAGToDAG.cpp87 bool IsZeroExt = (ExtType == ISD::ZEXTLOAD || ExtType == ISD::EXTLOAD); in INITIALIZE_PASS() local
93 if (IsZeroExt) in INITIALIZE_PASS()
99 if (IsZeroExt) in INITIALIZE_PASS()
/freebsd/contrib/llvm-project/llvm/lib/Target/ARM/
H A DARMISelLowering.cpp14166 auto IsZeroExt = [&](SDValue Op) { in PerformMVEVMULLCombine() local
14203 if (SDValue Op0 = IsZeroExt(N0)) { in PerformMVEVMULLCombine()
14204 if (SDValue Op1 = IsZeroExt(N1)) { in PerformMVEVMULLCombine()
/freebsd/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/
H A DDAGCombiner.cpp10194 bool IsZeroExt = LeftOp.getOpcode() == ISD::ZERO_EXTEND; in combineShiftToMULH() local
10196 if (!IsSignExt && !IsZeroExt) in combineShiftToMULH()
/freebsd/contrib/llvm-project/llvm/lib/Target/X86/
H A DX86ISelLowering.cpp57225 auto IsExt64 = [&DAG](SDValue Op, bool IsZeroExt) { in combineScalarToVector() argument
57228 unsigned Opc = IsZeroExt ? ISD::ZERO_EXTEND : ISD::ANY_EXTEND; in combineScalarToVector()
57232 unsigned Ext = IsZeroExt ? ISD::ZEXTLOAD : ISD::EXTLOAD; in combineScalarToVector()
57237 if (IsZeroExt) { in combineScalarToVector()