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Searched refs:IsWave32 (Results 1 – 11 of 11) sorted by relevance

/freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/
H A DSIPreEmitPeephole.cpp91 const bool IsWave32 = ST.isWave32(); in optimizeVccBranch() local
93 const unsigned ExecReg = IsWave32 ? AMDGPU::EXEC_LO : AMDGPU::EXEC; in optimizeVccBranch()
94 const unsigned And = IsWave32 ? AMDGPU::S_AND_B32 : AMDGPU::S_AND_B64; in optimizeVccBranch()
95 const unsigned AndN2 = IsWave32 ? AMDGPU::S_ANDN2_B32 : AMDGPU::S_ANDN2_B64; in optimizeVccBranch()
96 const unsigned Mov = IsWave32 ? AMDGPU::S_MOV_B32 : AMDGPU::S_MOV_B64; in optimizeVccBranch()
H A DSILowerI1Copies.h45 bool IsWave32 = false;
H A DSIFixSGPRCopies.cpp1131 bool IsWave32 = MF.getSubtarget<GCNSubtarget>().isWave32(); in fixSCCCopies() local
1146 TII->get(IsWave32 ? AMDGPU::S_CSELECT_B32 in fixSCCCopies()
1158 unsigned Opcode = IsWave32 ? AMDGPU::S_AND_B32 : AMDGPU::S_AND_B64; in fixSCCCopies()
1159 Register Exec = IsWave32 ? AMDGPU::EXEC_LO : AMDGPU::EXEC; in fixSCCCopies()
H A DSIWholeQuadMode.cpp1568 bool IsWave32 = ST->isWave32(); in lowerInitExec() local
1576 TII->get(IsWave32 ? AMDGPU::S_OR_SAVEEXEC_B32 in lowerInitExec()
1601 TII->get(IsWave32 ? AMDGPU::S_MOV_B32 : AMDGPU::S_MOV_B64), in lowerInitExec()
1649 TII->get(IsWave32 ? AMDGPU::S_BFM_B32 : AMDGPU::S_BFM_B64), Exec) in lowerInitExec()
1657 TII->get(IsWave32 ? AMDGPU::S_CMOV_B32 : AMDGPU::S_CMOV_B64), in lowerInitExec()
H A DSIRegisterInfo.cpp113 bool IsWave32; member
119 bool IsWave32, MachineBasicBlock::iterator MI, int Index, in SGPRSpillBuilder()
121 : SGPRSpillBuilder(TRI, TII, IsWave32, MI, MI->getOperand(0).getReg(), in SGPRSpillBuilder()
125 bool IsWave32, MachineBasicBlock::iterator MI, Register Reg, in SGPRSpillBuilder()
130 IsWave32(IsWave32) { in SGPRSpillBuilder()
135 if (IsWave32) { in SGPRSpillBuilder()
152 Data.PerVGPR = IsWave32 ? 32 : 64; in getPerVGPRData()
207 IsWave32 ? AMDGPU::SGPR_32RegClass : AMDGPU::SGPR_64RegClass; in prepare()
H A DSILowerI1Copies.cpp450 IsWave32 = ST->isWave32(); in PhiLoweringHelper()
452 if (IsWave32) { in PhiLoweringHelper()
H A DAMDGPUCallLowering.cpp962 bool IsTailCall, bool IsWave32, in getCallOpcode() argument
974 return IsWave32 ? AMDGPU::SI_CS_CHAIN_TC_W32_DVGPR in getCallOpcode()
976 return IsWave32 ? AMDGPU::SI_CS_CHAIN_TC_W32 : AMDGPU::SI_CS_CHAIN_TC_W64; in getCallOpcode()
H A DSIISelLowering.cpp5126 bool IsWave32 = ST.isWave32(); in lowerWaveReduce() local
5127 unsigned MovOpc = IsWave32 ? AMDGPU::S_MOV_B32 : AMDGPU::S_MOV_B64; in lowerWaveReduce()
5128 MCRegister ExecReg = IsWave32 ? AMDGPU::EXEC_LO : AMDGPU::EXEC; in lowerWaveReduce()
5130 IsWave32 ? AMDGPU::S_BCNT1_I32_B32 : AMDGPU::S_BCNT1_I32_B64; in lowerWaveReduce()
5209 bool IsWave32 = ST.isWave32(); in lowerWaveReduce() local
5210 unsigned MovOpc = IsWave32 ? AMDGPU::S_MOV_B32 : AMDGPU::S_MOV_B64; in lowerWaveReduce()
5211 unsigned ExecReg = IsWave32 ? AMDGPU::EXEC_LO : AMDGPU::EXEC; in lowerWaveReduce()
5237 unsigned SFFOpc = IsWave32 ? AMDGPU::S_FF1_I32_B32 : AMDGPU::S_FF1_I32_B64; in lowerWaveReduce()
5250 IsWave32 ? AMDGPU::S_BITSET0_B32 : AMDGPU::S_BITSET0_B64; in lowerWaveReduce()
5263 unsigned CMPOpc = IsWave32 ? AMDGPU::S_CMP_LG_U32 : AMDGPU::S_CMP_LG_U64; in lowerWaveReduce()
H A DSIInstrInfo.cpp5757 bool IsWave32 = ST.isWave32(); in insertScratchExecCopy() local
5762 unsigned MovOpc = IsWave32 ? AMDGPU::S_MOV_B32 : AMDGPU::S_MOV_B64; in insertScratchExecCopy()
5763 MCRegister Exec = IsWave32 ? AMDGPU::EXEC_LO : AMDGPU::EXEC; in insertScratchExecCopy()
5773 IsWave32 ? AMDGPU::S_OR_SAVEEXEC_B32 : AMDGPU::S_OR_SAVEEXEC_B64; in insertScratchExecCopy()
/freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/Utils/
H A DAMDGPUBaseInfo.cpp1309 bool IsWave32 = EnableWavefrontSize32 in getVGPRAllocGranule() local
1314 return IsWave32 ? 24 : 12; in getVGPRAllocGranule()
1317 return IsWave32 ? 16 : 8; in getVGPRAllocGranule()
1319 return IsWave32 ? 8 : 4; in getVGPRAllocGranule()
1327 bool IsWave32 = EnableWavefrontSize32 in getVGPREncodingGranule() local
1331 return IsWave32 ? 8 : 4; in getVGPREncodingGranule()
1341 bool IsWave32 = STI->getFeatureBits().test(FeatureWavefrontSize32); in getTotalNumVGPRs() local
1343 return IsWave32 ? 1536 : 768; in getTotalNumVGPRs()
1344 return IsWave32 ? 1024 : 512; in getTotalNumVGPRs()
/freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/Disassembler/
H A DAMDGPUDisassembler.cpp1983 bool IsWave32 = STI.hasFeature(AMDGPU::FeatureWavefrontSize32); in decodeSDWAVopcDst() local
1990 auto TTmpClsId = getTtmpClassId(IsWave32 ? 32 : 64); in decodeSDWAVopcDst()
1994 return IsWave32 ? decodeSpecialReg32(Val) : decodeSpecialReg64(Val); in decodeSDWAVopcDst()
1996 return createSRegOperand(getSgprClassId(IsWave32 ? 32 : 64), Val); in decodeSDWAVopcDst()
1998 return createRegOperand(IsWave32 ? AMDGPU::VCC_LO : AMDGPU::VCC); in decodeSDWAVopcDst()