| /freebsd/contrib/llvm-project/llvm/utils/TableGen/ |
| H A D | VTEmitter.cpp | 33 bool IsVector = VT->getValueAsBit("isVector"); in VTtoGetLLVMTyString() local
34 if (IsVector) in VTtoGetLLVMTyString()
38 auto OutputVT = IsVector ? VT->getValueAsDef("ElementType") : VT; in VTtoGetLLVMTyString()
75 if (IsVector) in VTtoGetLLVMTyString()
120 bool IsVector = VT->getValueAsBit("isVector"); in run() local
123 int64_t NElem = IsVector ? VT->getValueAsInt("nElem") : 0; in run()
124 StringRef EltName = IsVector ? VT->getValueAsDef("ElementType")->getName() in run()
128 IsInteger && IsVector && !IsScalable); in run()
132 IsFP && IsVector && !IsScalable); in run()
134 UpdateVTRange("FIXEDLEN_VECTOR_VALUETYPE", Name, IsVector && !IsScalable); in run()
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| /freebsd/contrib/llvm-project/llvm/include/llvm/CodeGenTypes/ |
| H A D | LowLevelType.h | 141 : IsScalar(false), IsPointer(false), IsVector(false), RawData(0) {} in LLT()
148 constexpr bool isVector() const { return isValid() && IsVector; } in isVector()
150 return isValid() && IsPointer && !IsVector; in isPointer()
185 assert(IsVector && "cannot get number of elements on scalar/aggregate"); in getElementCount()
270 if (IsVector) { in getScalarSizeInBits()
283 if (!IsVector) in getAddressSpace()
305 return IsPointer == RHS.IsPointer && IsVector == RHS.IsVector &&
396 uint64_t IsVector : 1;
417 constexpr void init(bool IsPointer, bool IsVector, bool IsScalar,
423 this->IsVector = IsVector;
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| /freebsd/contrib/llvm-project/clang/lib/CodeGen/Targets/ |
| H A D | SystemZ.cpp | 269 bool IsVector = false; in EmitVAArg() local
281 IsVector = ArgTy->isVectorTy(); in EmitVAArg()
286 if (IsVector && UnpaddedSize > PaddedSize) in EmitVAArg()
296 if (IsVector) { in EmitVAArg()
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| /freebsd/contrib/llvm-project/llvm/include/llvm/CodeGen/GlobalISel/ |
| H A D | Utils.h | 530 bool isConstTrueVal(const TargetLowering &TLI, int64_t Val, bool IsVector,
534 bool isConstFalseVal(const TargetLowering &TLI, int64_t Val, bool IsVector,
539 int64_t getICmpTrueVal(const TargetLowering &TLI, bool IsVector, bool IsFP);
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| H A D | MachineIRBuilder.h | 734 bool IsVector,
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| /freebsd/contrib/llvm-project/llvm/lib/CodeGenTypes/ |
| H A D | LowLevelType.cpp | 33 IsVector = false; in LLT()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
| H A D | R600ExpandSpecialInstrs.cpp | 164 bool IsVector = TII->isVector(MI); in runOnMachineFunction() local
166 if (!IsReduction && !IsVector && !IsCube) { in runOnMachineFunction()
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| H A D | AMDGPUInstructionSelector.cpp | 650 const bool IsVector = DstBank->getID() == AMDGPU::VGPRRegBankID; in selectG_BUILD_VECTOR() local
670 if (IsVector) { in selectG_BUILD_VECTOR()
694 IsVector ? AMDGPU::VGPR_32RegClass : AMDGPU::SReg_32RegClass; in selectG_BUILD_VECTOR()
700 if (IsVector) { in selectG_BUILD_VECTOR()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/ARM/MCTargetDesc/ |
| H A D | ARMELFStreamer.cpp | 1390 const SmallVectorImpl<unsigned> &RegList, bool IsVector, in collectHWRegs() argument
1399 assert(Reg < (IsVector ? 32U : 16U) && "Register out of range"); in collectHWRegs()
1413 bool IsVector) { in emitRegSave() argument
1426 std::tie(Idx, Count) = collectHWRegs(MRI, Idx, RegList, IsVector, Mask); in emitRegSave()
1432 SPOffset -= Count * (IsVector ? 8 : 4); in emitRegSave()
1436 if (IsVector) in emitRegSave()
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| /freebsd/contrib/llvm-project/llvm/lib/CodeGen/GlobalISel/ |
| H A D | Utils.cpp | 1593 bool llvm::isConstTrueVal(const TargetLowering &TLI, int64_t Val, bool IsVector, in isConstTrueVal() argument
1595 switch (TLI.getBooleanContents(IsVector, IsFP)) { in isConstTrueVal()
1607 bool IsVector, bool IsFP) { in isConstFalseVal() argument
1608 switch (TLI.getBooleanContents(IsVector, IsFP)) { in isConstFalseVal()
1618 int64_t llvm::getICmpTrueVal(const TargetLowering &TLI, bool IsVector, in getICmpTrueVal() argument
1620 switch (TLI.getBooleanContents(IsVector, IsFP)) { in getICmpTrueVal()
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| H A D | MachineIRBuilder.cpp | 532 bool IsVector, in buildBoolExtInReg() argument
535 switch (TLI->getBooleanContents(IsVector, IsFP)) { in buildBoolExtInReg()
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| H A D | CombinerHelper.cpp | 3388 int64_t Cst, bool IsVector, bool IsFP) { in isConstValidTrue() argument
3391 isConstTrueVal(TLI, Cst, IsVector, IsFP); in isConstValidTrue()
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| /freebsd/contrib/llvm-project/llvm/include/llvm/AsmParser/ |
| H A D | LLParser.h | 463 bool parseArrayVectorType(Type *&Result, bool IsVector);
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| /freebsd/contrib/llvm-project/clang/lib/CodeGen/ |
| H A D | CGExpr.cpp | 2069 bool IsVector = true) { in MaybeConvertMatrixAddress() argument
2071 if (ArrayTy && IsVector) { in MaybeConvertMatrixAddress()
2078 if (VectorTy && !IsVector) { in MaybeConvertMatrixAddress()
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| /freebsd/contrib/llvm-project/llvm/lib/AsmParser/ |
| H A D | LLParser.cpp | 3436 bool LLParser::parseArrayVectorType(Type *&Result, bool IsVector) { in parseArrayVectorType() argument
3439 if (IsVector && Lex.getKind() == lltok::kw_vscale) { in parseArrayVectorType()
3463 if (parseToken(IsVector ? lltok::greater : lltok::rsquare, in parseArrayVectorType()
3467 if (IsVector) { in parseArrayVectorType()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/ARM/AsmParser/ |
| H A D | ARMAsmParser.cpp | 476 bool parseDirectiveRegSave(SMLoc L, bool IsVector);
12159 bool ARMAsmParser::parseDirectiveRegSave(SMLoc L, bool IsVector) { in parseDirectiveRegSave() argument
12173 if (!IsVector && !Op.isRegList()) in parseDirectiveRegSave()
12175 if (IsVector && !Op.isDPRRegList()) in parseDirectiveRegSave()
12178 getTargetStreamer().emitRegSave(Op.getRegList(), IsVector); in parseDirectiveRegSave()
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| /freebsd/contrib/llvm-project/llvm/lib/Transforms/Vectorize/ |
| H A D | VPlan.h | 754 bool skipCostComputation(Instruction *UI, bool IsVector) const;
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| H A D | LoopVectorize.cpp | 6957 bool VPCostContext::skipCostComputation(Instruction *UI, bool IsVector) const { in skipCostComputation()
6959 (IsVector && CM.VecValuesToIgnore.contains(UI)) || in skipCostComputation()
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