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Searched refs:IsVector (Results 1 – 20 of 20) sorted by relevance

/freebsd/contrib/llvm-project/llvm/utils/TableGen/Basic/
H A DVTEmitter.cpp32 bool IsVector = VT->getValueAsBit("isVector"); in vTtoGetLlvmTyString() local
44 if (IsVector) in vTtoGetLlvmTyString()
48 auto OutputVT = IsVector ? VT->getValueAsDef("ElementType") : VT; in vTtoGetLlvmTyString()
86 if (IsVector) in vTtoGetLlvmTyString()
132 bool IsVector = VT->getValueAsBit("isVector"); in run() local
137 int64_t NElem = IsVector ? VT->getValueAsInt("nElem") : 0; in run()
138 StringRef EltName = IsVector ? VT->getValueAsDef("ElementType")->getName() in run()
142 IsInteger && IsVector && !IsScalable); in run()
146 IsFP && IsVector && !IsScalable); in run()
148 UpdateVTRange("FIXEDLEN_VECTOR_VALUETYPE", Name, IsVector && !IsScalable); in run()
[all …]
/freebsd/contrib/llvm-project/llvm/include/llvm/CodeGenTypes/
H A DLowLevelType.h142 : IsScalar(false), IsPointer(false), IsVector(false), RawData(0) {} in LLT()
149 constexpr bool isVector() const { return isValid() && IsVector; } in isVector()
151 return isValid() && IsPointer && !IsVector; in isPointer()
185 assert(IsVector && "cannot get number of elements on scalar/aggregate"); in getElementCount()
293 return IsPointer == RHS.IsPointer && IsVector == RHS.IsVector &&
363 uint64_t IsVector : 1;
384 constexpr void init(bool IsPointer, bool IsVector, bool IsScalar,
390 this->IsVector = IsVector;
398 if (IsVector) {
407 ((uint64_t)IsPointer) << 1 | ((uint64_t)IsVector);
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/freebsd/contrib/llvm-project/llvm/lib/Target/DirectX/
H A DDXILIntrinsicExpansion.cpp567 bool IsVector = false; in expandBufferLoadIntrinsic() local
571 IsVector = true; in expandBufferLoadIntrinsic()
626 if (IsVector) in expandBufferLoadIntrinsic()
681 bool IsVector = false; in expandBufferStoreIntrinsic() local
688 IsVector = true; in expandBufferStoreIntrinsic()
697 if (IsVector) in expandBufferStoreIntrinsic()
713 if (IsVector) in expandBufferStoreIntrinsic()
723 if (IsVector) { in expandBufferStoreIntrinsic()
/freebsd/contrib/llvm-project/clang/lib/CodeGen/Targets/
H A DSystemZ.cpp281 bool IsVector = false; in EmitVAArg() local
294 IsVector = ArgTy->isVectorTy(); in EmitVAArg()
299 if (IsVector && UnpaddedSize > PaddedSize) in EmitVAArg()
309 if (IsVector) { in EmitVAArg()
/freebsd/contrib/llvm-project/llvm/lib/CodeGenTypes/
H A DLowLevelType.cpp33 IsVector = false; in LLT()
/freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/
H A DR600ExpandSpecialInstrs.cpp165 bool IsVector = TII->isVector(MI); in runOnMachineFunction() local
167 if (!IsReduction && !IsVector && !IsCube) { in runOnMachineFunction()
H A DAMDGPUInstructionSelector.cpp748 const bool IsVector = DstBank->getID() == AMDGPU::VGPRRegBankID; in selectG_BUILD_VECTOR() local
768 if (IsVector) { in selectG_BUILD_VECTOR()
792 IsVector ? AMDGPU::VGPR_32RegClass : AMDGPU::SReg_32RegClass; in selectG_BUILD_VECTOR()
798 if (IsVector) { in selectG_BUILD_VECTOR()
/freebsd/contrib/llvm-project/llvm/include/llvm/CodeGen/GlobalISel/
H A DUtils.h557 bool IsVector, bool IsFP);
561 bool IsVector, bool IsFP);
565 LLVM_ABI int64_t getICmpTrueVal(const TargetLowering &TLI, bool IsVector,
H A DMachineIRBuilder.h746 bool IsVector,
/freebsd/contrib/llvm-project/llvm/lib/Target/ARM/MCTargetDesc/
H A DARMELFStreamer.cpp1420 const SmallVectorImpl<MCRegister> &RegList, bool IsVector, in collectHWRegs() argument
1429 assert(RegEnc < (IsVector ? 32U : 16U) && "Register out of range"); in collectHWRegs()
1443 bool IsVector) { in emitRegSave() argument
1456 std::tie(Idx, Count) = collectHWRegs(MRI, Idx, RegList, IsVector, Mask); in emitRegSave()
1462 SPOffset -= Count * (IsVector ? 8 : 4); in emitRegSave()
1466 if (IsVector) in emitRegSave()
/freebsd/contrib/llvm-project/llvm/lib/CodeGen/GlobalISel/
H A DUtils.cpp1624 bool llvm::isConstTrueVal(const TargetLowering &TLI, int64_t Val, bool IsVector, in isConstTrueVal() argument
1626 switch (TLI.getBooleanContents(IsVector, IsFP)) { in isConstTrueVal()
1638 bool IsVector, bool IsFP) { in isConstFalseVal() argument
1639 switch (TLI.getBooleanContents(IsVector, IsFP)) { in isConstFalseVal()
1649 int64_t llvm::getICmpTrueVal(const TargetLowering &TLI, bool IsVector, in getICmpTrueVal() argument
1651 switch (TLI.getBooleanContents(IsVector, IsFP)) { in getICmpTrueVal()
H A DMachineIRBuilder.cpp534 bool IsVector, in buildBoolExtInReg() argument
537 switch (TLI->getBooleanContents(IsVector, IsFP)) { in buildBoolExtInReg()
H A DCombinerHelper.cpp3425 int64_t Cst, bool IsVector, bool IsFP) { in isConstValidTrue() argument
3428 isConstTrueVal(TLI, Cst, IsVector, IsFP); in isConstValidTrue()
/freebsd/contrib/llvm-project/llvm/lib/Transforms/Vectorize/
H A DVPlanHelpers.h365 bool skipCostComputation(Instruction *UI, bool IsVector) const;
H A DVPlanTransforms.cpp2822 auto IsVector = [](ElementCount VF) { return VF.isVector(); }; in handleUncountableEarlyExit() local
2828 LoopVectorizationPlanner::getDecisionAndClampRange(IsVector, Range)) { in handleUncountableEarlyExit()
H A DLoopVectorize.cpp6727 bool VPCostContext::skipCostComputation(Instruction *UI, bool IsVector) const { in skipCostComputation()
6729 (IsVector && CM.VecValuesToIgnore.contains(UI)) || in skipCostComputation()
/freebsd/contrib/llvm-project/llvm/include/llvm/AsmParser/
H A DLLParser.h467 bool parseArrayVectorType(Type *&Result, bool IsVector);
/freebsd/contrib/llvm-project/llvm/lib/AsmParser/
H A DLLParser.cpp3535 bool LLParser::parseArrayVectorType(Type *&Result, bool IsVector) { in parseArrayVectorType() argument
3538 if (IsVector && Lex.getKind() == lltok::kw_vscale) { in parseArrayVectorType()
3562 if (parseToken(IsVector ? lltok::greater : lltok::rsquare, in parseArrayVectorType()
3566 if (IsVector) { in parseArrayVectorType()
/freebsd/contrib/llvm-project/clang/lib/CodeGen/
H A DCGExpr.cpp2139 bool IsVector = true) { in MaybeConvertMatrixAddress() argument
2141 if (ArrayTy && IsVector) { in MaybeConvertMatrixAddress()
2148 if (VectorTy && !IsVector) { in MaybeConvertMatrixAddress()
/freebsd/contrib/llvm-project/llvm/lib/Target/ARM/AsmParser/
H A DARMAsmParser.cpp479 bool parseDirectiveRegSave(SMLoc L, bool IsVector);
12216 bool ARMAsmParser::parseDirectiveRegSave(SMLoc L, bool IsVector) { in parseDirectiveRegSave() argument
12230 if (!IsVector && !Op.isRegList()) in parseDirectiveRegSave()
12232 if (IsVector && !Op.isDPRRegList()) in parseDirectiveRegSave()
12235 getTargetStreamer().emitRegSave(Op.getRegList(), IsVector); in parseDirectiveRegSave()