| /freebsd/contrib/llvm-project/llvm/lib/Target/Hexagon/ |
| H A D | HexagonTfrCleanup.cpp | 226 bool IsUndef = false; in eraseIfRedundant() local 232 IsUndef = MI->getOperand(1).isUndef(); in eraseIfRedundant() 239 IsUndef = MI->getOperand(2).isUndef(); in eraseIfRedundant() 246 if (IsUndef) { in eraseIfRedundant()
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| H A D | HexagonISelLoweringHVX.cpp | 820 bool IsUndef = true; in buildHvxVectorReg() local 824 IsUndef = false; in buildHvxVectorReg() 830 if (IsUndef) in buildHvxVectorReg()
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| /freebsd/contrib/llvm-project/llvm/include/llvm/CodeGen/ |
| H A D | MachineOperand.h | 132 unsigned IsUndef : 1; variable 405 return IsUndef; in isUndef() 532 IsUndef = Val; 856 Op.IsUndef = isUndef;
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| H A D | MachineInstr.h | 1718 LLVM_ABI void setRegisterDefReadUndef(Register Reg, bool IsUndef = true);
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| /freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
| H A D | SIShrinkInstructions.cpp | 345 bool IsUndef = true; in shrinkMIMG() local 366 IsUndef = false; in shrinkMIMG() 400 MI.getOperand(VAddr0Idx).setIsUndef(IsUndef); in shrinkMIMG() 585 const bool IsUndef = SrcReg->isUndef(); in shrinkScalarLogicOp() local 594 /*isDead*/ false, IsUndef); in shrinkScalarLogicOp()
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| H A D | GCNHazardRecognizer.cpp | 1230 bool IsUndef = Src0->isUndef(); in fixVcmpxPermlaneHazards() local 1233 .addReg(Reg, RegState::Define | (IsUndef ? RegState::Dead : 0)) in fixVcmpxPermlaneHazards() 1234 .addReg(Reg, IsUndef ? RegState::Undef : RegState::Kill); in fixVcmpxPermlaneHazards()
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| H A D | SIInstrInfo.cpp | 2356 bool IsUndef = MI.getOperand(1).isUndef(); in expandPostRAPseudo() local 2365 .addReg(VecReg, RegState::Implicit | (IsUndef ? RegState::Undef : 0)); in expandPostRAPseudo() 2388 bool IsUndef = MI.getOperand(1).isUndef(); in expandPostRAPseudo() local 2404 RegState::Implicit | (IsUndef ? RegState::Undef : 0)); in expandPostRAPseudo() 2433 bool IsUndef = MI.getOperand(1).isUndef(); in expandPostRAPseudo() local 2445 .addReg(VecReg, RegState::Implicit | (IsUndef ? RegState::Undef : 0)); in expandPostRAPseudo() 2751 bool IsUndef = RegOp.isUndef(); in swapRegAndNonRegOperand() local 2767 NonRegOp.ChangeToRegister(Reg, false, false, IsKill, IsDead, IsUndef, IsDebug); in swapRegAndNonRegOperand()
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| /freebsd/contrib/llvm-project/clang/include/clang/Basic/ |
| H A D | TargetBuiltins.h | 409 bool isUndef() const { return Flags & IsUndef; } in isUndef()
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| H A D | arm_sve_sme_incl.td | 226 def IsUndef : FlagType<0x80000000>; // Codegen `undef` of given type.
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| H A D | arm_sve.td | 1216 def SVUNDEF_1 : SInst<"svundef_{d}", "dv", "csilUcUsUiUlhfdbm", MergeNone, "", [IsUndef, VerifyRun… 1217 def SVUNDEF_2 : SInst<"svundef2_{d}", "2v", "csilUcUsUiUlhfdbm", MergeNone, "", [IsUndef, VerifyRun… 1218 def SVUNDEF_3 : SInst<"svundef3_{d}", "3v", "csilUcUsUiUlhfdbm", MergeNone, "", [IsUndef, VerifyRun… 1219 def SVUNDEF_4 : SInst<"svundef4_{d}", "4v", "csilUcUsUiUlhfdbm", MergeNone, "", [IsUndef, VerifyRun… 1247 def SVUNDEF_2_B: Inst<"svundef2_b", "2", "Pc", MergeNone, "", [IsUndef, VerifyRuntimeMode], []>; 1248 def SVUNDEF_4_B: Inst<"svundef4_b", "4", "Pc", MergeNone, "", [IsUndef, VerifyRuntimeMode], []>;
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| /freebsd/contrib/llvm-project/clang/lib/Lex/ |
| H A D | Preprocessor.cpp | 1507 bool IsUndef) const { in emitFinalMacroWarning() 1514 << Identifier.getIdentifierInfo() << (IsUndef ? 0 : 1); in emitFinalMacroWarning()
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| /freebsd/contrib/llvm-project/llvm/lib/CodeGen/ |
| H A D | RegisterCoalescer.cpp | 1852 bool IsUndef = true; in addUndefFlag() local 1857 IsUndef = false; in addUndefFlag() 1861 if (IsUndef) { in addUndefFlag()
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| H A D | MachineInstr.cpp | 2247 void MachineInstr::setRegisterDefReadUndef(Register Reg, bool IsUndef) { in setRegisterDefReadUndef() argument 2250 MO.setIsUndef(IsUndef); in setRegisterDefReadUndef()
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| H A D | MachineOperand.cpp | 312 IsUndef = isUndef; in ChangeToRegister()
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| /freebsd/contrib/llvm-project/clang/include/clang/Lex/ |
| H A D | Preprocessor.h | 3007 void emitFinalMacroWarning(const Token &Identifier, bool IsUndef) const;
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| /freebsd/contrib/llvm-project/llvm/lib/Analysis/ |
| H A D | InstructionSimplify.cpp | 5658 bool IsUndef = Q.isUndefValue(V); in simplifyFPOp() local 5663 if (FMF.noNaNs() && (IsNan || IsUndef)) in simplifyFPOp() 5665 if (FMF.noInfs() && (IsInf || IsUndef)) in simplifyFPOp() 5673 if (IsUndef) in simplifyFPOp()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/ |
| H A D | AArch64InstrInfo.cpp | 5635 bool IsUndef = true; in loadRegPairFromStackSlot() local 5641 IsUndef = false; in loadRegPairFromStackSlot() 5644 .addReg(DestReg0, RegState::Define | getUndefRegState(IsUndef), SubIdx0) in loadRegPairFromStackSlot() 5645 .addReg(DestReg1, RegState::Define | getUndefRegState(IsUndef), SubIdx1) in loadRegPairFromStackSlot()
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| /freebsd/contrib/llvm-project/llvm/lib/CodeGen/GlobalISel/ |
| H A D | CombinerHelper.cpp | 318 bool IsUndef = true; in matchCombineConcatVectors() local 332 IsUndef = false; in matchCombineConcatVectors() 367 if (IsUndef) in matchCombineConcatVectors()
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| H A D | LegalizerHelper.cpp | 6983 const bool IsUndef = MI.getOpcode() == TargetOpcode::G_CTLZ_ZERO_UNDEF; in narrowScalarCTLZ() local 6991 auto LoCTLZ = IsUndef ? in narrowScalarCTLZ() 7016 const bool IsUndef = MI.getOpcode() == TargetOpcode::G_CTTZ_ZERO_UNDEF; in narrowScalarCTTZ() local 7024 auto HiCTTZ = IsUndef ? in narrowScalarCTTZ()
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| /freebsd/contrib/llvm-project/clang/lib/Serialization/ |
| H A D | ASTReader.cpp | 637 bool IsUndef = PPOpts.Macros[I].second; in collectMacroDefinitions() local 644 if (IsUndef) { in collectMacroDefinitions() 6519 bool IsUndef = Record[Idx++]; in ParsePreprocessorOptions() local 6520 PPOpts.Macros.push_back(std::make_pair(Macro, IsUndef)); in ParsePreprocessorOptions()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/X86/ |
| H A D | X86ISelLowering.cpp | 3998 bool IsUndef = Values[i] < 0 && IsMask; in getConstVector() local 3999 SDValue OpNode = IsUndef ? DAG.getUNDEF(EltVT) : in getConstVector() 4003 Ops.push_back(IsUndef ? DAG.getUNDEF(EltVT) : in getConstVector()
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