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Searched refs:IsUndef (Results 1 – 21 of 21) sorted by relevance

/freebsd/contrib/llvm-project/llvm/lib/Target/Hexagon/
H A DHexagonTfrCleanup.cpp245 bool IsUndef = false; in eraseIfRedundant() local
251 IsUndef = MI->getOperand(1).isUndef(); in eraseIfRedundant()
258 IsUndef = MI->getOperand(2).isUndef(); in eraseIfRedundant()
265 if (IsUndef) { in eraseIfRedundant()
H A DHexagonISelLoweringHVX.cpp810 bool IsUndef = true; in buildHvxVectorReg() local
814 IsUndef = false; in buildHvxVectorReg()
820 if (IsUndef) in buildHvxVectorReg()
/freebsd/contrib/llvm-project/llvm/include/llvm/CodeGen/
H A DMachineOperand.h115 /// IsUndef - True if this register operand reads an "undef" value, i.e. the
132 unsigned IsUndef : 1; variable
406 return IsUndef; in isUndef()
532 IsUndef = Val;
851 Op.IsUndef = isUndef;
H A DMachineInstr.h1708 void setRegisterDefReadUndef(Register Reg, bool IsUndef = true);
/freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/
H A DSIShrinkInstructions.cpp334 bool IsUndef = true; in shrinkMIMG() local
355 IsUndef = false; in shrinkMIMG()
389 MI.getOperand(VAddr0Idx).setIsUndef(IsUndef); in shrinkMIMG()
557 const bool IsUndef = SrcReg->isUndef(); in shrinkScalarLogicOp() local
566 /*isDead*/ false, IsUndef); in shrinkScalarLogicOp()
H A DGCNHazardRecognizer.cpp1138 bool IsUndef = Src0->isUndef(); in fixVcmpxPermlaneHazards() local
1141 .addReg(Reg, RegState::Define | (IsUndef ? RegState::Dead : 0)) in fixVcmpxPermlaneHazards()
1142 .addReg(Reg, IsUndef ? RegState::Undef : RegState::Kill); in fixVcmpxPermlaneHazards()
H A DSIInstrInfo.cpp2350 bool IsUndef = MI.getOperand(1).isUndef(); in expandPostRAPseudo() local
2359 .addReg(VecReg, RegState::Implicit | (IsUndef ? RegState::Undef : 0)); in expandPostRAPseudo()
2382 bool IsUndef = MI.getOperand(1).isUndef(); in expandPostRAPseudo() local
2398 RegState::Implicit | (IsUndef ? RegState::Undef : 0)); in expandPostRAPseudo()
2427 bool IsUndef = MI.getOperand(1).isUndef(); in expandPostRAPseudo() local
2439 .addReg(VecReg, RegState::Implicit | (IsUndef ? RegState::Undef : 0)); in expandPostRAPseudo()
2746 bool IsUndef = RegOp.isUndef(); in swapRegAndNonRegOperand() local
2762 NonRegOp.ChangeToRegister(Reg, false, false, IsKill, IsDead, IsUndef, IsDebug); in swapRegAndNonRegOperand()
/freebsd/contrib/llvm-project/clang/include/clang/Basic/
H A DTargetBuiltins.h308 bool isUndef() const { return Flags & IsUndef; } in isUndef()
H A Darm_sve_sme_incl.td217 def IsUndef : FlagType<0x80000000>; // Codegen `undef` of given type.
H A Darm_sve.td1300 def SVUNDEF_1 : SInst<"svundef_{d}", "dv", "csilUcUsUiUlhfd", MergeNone, "", [IsUndef, VerifyRunti…
1301 def SVUNDEF_2 : SInst<"svundef2_{d}", "2v", "csilUcUsUiUlhfd", MergeNone, "", [IsUndef, VerifyRunti…
1302 def SVUNDEF_3 : SInst<"svundef3_{d}", "3v", "csilUcUsUiUlhfd", MergeNone, "", [IsUndef, VerifyRunti…
1303 def SVUNDEF_4 : SInst<"svundef4_{d}", "4v", "csilUcUsUiUlhfd", MergeNone, "", [IsUndef, VerifyRunti…
1310 def SVUNDEF_1_BF16 : SInst<"svundef_{d}", "dv", "b", MergeNone, "", [IsUndef, VerifyRuntimeMode]>;
1311 def SVUNDEF_2_BF16 : SInst<"svundef2_{d}", "2v", "b", MergeNone, "", [IsUndef, VerifyRuntimeMode]>;
1312 def SVUNDEF_3_BF16 : SInst<"svundef3_{d}", "3v", "b", MergeNone, "", [IsUndef, VerifyRuntimeMode]>;
1313 def SVUNDEF_4_BF16 : SInst<"svundef4_{d}", "4v", "b", MergeNone, "", [IsUndef, VerifyRuntimeMode]>;
1354 def SVUNDEF_2_B: Inst<"svundef2_b", "2", "Pc", MergeNone, "", [IsUndef, VerifyRuntimeMode], []>;
1355 def SVUNDEF_4_B: Inst<"svundef4_b", "4", "Pc", MergeNone, "", [IsUndef, VerifyRuntimeMode], []>;
/freebsd/contrib/llvm-project/clang/lib/Lex/
H A DPreprocessor.cpp1475 bool IsUndef) const { in emitFinalMacroWarning()
1482 << Identifier.getIdentifierInfo() << (IsUndef ? 0 : 1); in emitFinalMacroWarning()
/freebsd/contrib/llvm-project/llvm/lib/CodeGen/
H A DRegisterCoalescer.cpp1795 bool IsUndef = true; in addUndefFlag() local
1800 IsUndef = false; in addUndefFlag()
1804 if (IsUndef) { in addUndefFlag()
H A DMachineOperand.cpp300 IsUndef = isUndef; in ChangeToRegister()
H A DMachineInstr.cpp2135 void MachineInstr::setRegisterDefReadUndef(Register Reg, bool IsUndef) { in setRegisterDefReadUndef() argument
2139 MO.setIsUndef(IsUndef); in setRegisterDefReadUndef()
/freebsd/contrib/llvm-project/clang/include/clang/Lex/
H A DPreprocessor.h2932 void emitFinalMacroWarning(const Token &Identifier, bool IsUndef) const;
/freebsd/contrib/llvm-project/llvm/lib/Analysis/
H A DInstructionSimplify.cpp5621 bool IsUndef = Q.isUndefValue(V); in simplifyFPOp() local
5626 if (FMF.noNaNs() && (IsNan || IsUndef)) in simplifyFPOp()
5628 if (FMF.noInfs() && (IsInf || IsUndef)) in simplifyFPOp()
5636 if (IsUndef) in simplifyFPOp()
/freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/
H A DAArch64InstrInfo.cpp4984 bool IsUndef = true; in loadRegPairFromStackSlot() local
4990 IsUndef = false; in loadRegPairFromStackSlot()
4993 .addReg(DestReg0, RegState::Define | getUndefRegState(IsUndef), SubIdx0) in loadRegPairFromStackSlot()
4994 .addReg(DestReg1, RegState::Define | getUndefRegState(IsUndef), SubIdx1) in loadRegPairFromStackSlot()
/freebsd/contrib/llvm-project/llvm/lib/CodeGen/GlobalISel/
H A DLegalizerHelper.cpp6293 const bool IsUndef = MI.getOpcode() == TargetOpcode::G_CTLZ_ZERO_UNDEF; in narrowScalarCTLZ() local
6301 auto LoCTLZ = IsUndef ? in narrowScalarCTLZ()
6326 const bool IsUndef = MI.getOpcode() == TargetOpcode::G_CTTZ_ZERO_UNDEF; in narrowScalarCTTZ() local
6334 auto HiCTTZ = IsUndef ? in narrowScalarCTTZ()
H A DCombinerHelper.cpp300 bool IsUndef = true; in matchCombineConcatVectors() local
314 IsUndef = false; in matchCombineConcatVectors()
349 if (IsUndef) in matchCombineConcatVectors()
/freebsd/contrib/llvm-project/clang/lib/Serialization/
H A DASTReader.cpp619 bool IsUndef = PPOpts.Macros[I].second; in collectMacroDefinitions() local
626 if (IsUndef) { in collectMacroDefinitions()
6183 bool IsUndef = Record[Idx++]; in ParsePreprocessorOptions() local
6184 PPOpts.Macros.push_back(std::make_pair(Macro, IsUndef)); in ParsePreprocessorOptions()
/freebsd/contrib/llvm-project/llvm/lib/Target/X86/
H A DX86ISelLowering.cpp3802 bool IsUndef = Values[i] < 0 && IsMask; in getConstVector() local
3803 SDValue OpNode = IsUndef ? DAG.getUNDEF(EltVT) : in getConstVector()
3807 Ops.push_back(IsUndef ? DAG.getUNDEF(EltVT) : in getConstVector()