| /freebsd/contrib/llvm-project/llvm/lib/Target/M68k/ |
| H A D | M68kFrameLowering.cpp | 340 bool IsSub = NumBytes < 0; in emitSPUpdate() local
341 uint64_t Offset = IsSub ? -NumBytes : NumBytes; in emitSPUpdate()
352 if (IsSub && !isRegLiveIn(MBB, M68k::D0)) in emitSPUpdate()
360 Opc = IsSub ? M68k::SUB32ar : M68k::ADD32ar; in emitSPUpdate()
374 MBB, MBBI, DL, IsSub ? -ThisVal : ThisVal, InEpilogue); in emitSPUpdate()
375 if (IsSub) in emitSPUpdate()
427 bool IsSub = Offset < 0; in BuildStackAdjustment() local
428 uint64_t AbsOffset = IsSub ? -Offset : Offset; in BuildStackAdjustment()
429 unsigned Opc = IsSub ? M68k::SUB32ai : M68k::ADD32ai; in BuildStackAdjustment()
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| /freebsd/contrib/llvm-project/libc/src/__support/FPUtil/generic/ |
| H A D | add_sub.h | 29 template <bool IsSub, typename OutType, typename InType>
50 bool is_effectively_add = (x_bits.sign() == y_bits.sign()) != IsSub; in add_or_sub()
107 if constexpr (IsSub) in add_or_sub()
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| /freebsd/contrib/llvm-project/llvm/lib/CodeGen/ |
| H A D | ComplexDeinterleavingPass.cpp | 676 auto IsSub = [](unsigned Op) { in identifyPartialMul() local
682 else if (IsSub(Real->getOpcode()) && IsAdd(Imag->getOpcode())) in identifyPartialMul()
684 else if (IsSub(Real->getOpcode()) && IsSub(Imag->getOpcode())) in identifyPartialMul()
686 else if (IsAdd(Real->getOpcode()) && IsSub(Imag->getOpcode())) in identifyPartialMul()
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| H A D | AggressiveAntiDepBreaker.cpp | 582 bool IsSub = TRI->isSubRegister(SuperReg, Reg); in FindSuitableFreeRegisters() local
586 if (!IsSub) in FindSuitableFreeRegisters()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/X86/ |
| H A D | X86InstructionSelector.cpp | |
| H A D | X86FrameLowering.cpp | 384 bool IsSub = Offset < 0; in BuildStackAdjustment() local
385 uint64_t AbsOffset = IsSub ? -Offset : Offset; in BuildStackAdjustment()
386 const unsigned Opc = IsSub ? getSUBriOpcode(Uses64BitFramePtr) in BuildStackAdjustment()
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| H A D | X86ISelLowering.cpp | 52161 static SDValue combineAddOrSubToADCOrSBB(bool IsSub, const SDLoc &DL, EVT VT, in combineAddOrSubToADCOrSBB() argument
52189 if ((!IsSub && CC == X86::COND_AE && ConstantX->isAllOnes()) || in combineAddOrSubToADCOrSBB()
52190 (IsSub && CC == X86::COND_B && ConstantX->isZero())) { in combineAddOrSubToADCOrSBB()
52199 if ((!IsSub && CC == X86::COND_BE && ConstantX->isAllOnes()) || in combineAddOrSubToADCOrSBB()
52200 (IsSub && CC == X86::COND_A && ConstantX->isZero())) { in combineAddOrSubToADCOrSBB()
52221 return DAG.getNode(IsSub ? X86ISD::SBB : X86ISD::ADC, DL, in combineAddOrSubToADCOrSBB()
52243 return DAG.getNode(IsSub ? X86ISD::SBB : X86ISD::ADC, DL, in combineAddOrSubToADCOrSBB()
52252 return DAG.getNode(IsSub ? X86ISD::ADC : X86ISD::SBB, DL, in combineAddOrSubToADCOrSBB()
52273 return DAG.getNode(IsSub ? X86ISD::ADC : X86ISD::SBB, DL, in combineAddOrSubToADCOrSBB()
52297 if ((IsSub && CC == X86::COND_NE && ConstantX->isZero()) || in combineAddOrSubToADCOrSBB()
[all …]
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| /freebsd/contrib/llvm-project/llvm/lib/Target/X86/GISel/ |
| H A D | X86InstructionSelector.cpp | 1170 bool IsSub = I.getOpcode() == TargetOpcode::G_USUBE || in selectUAddSub() local
1212 unsigned Opcode = IsSub ? OpSUB : OpADD; in selectUAddSub()
1236 Opcode = IsSub ? OpSBB : OpADC; in selectUAddSub()
1242 Opcode = IsSub ? OpSUB : OpADD; in selectUAddSub()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/Hexagon/ |
| H A D | HexagonConstExtenders.cpp | 1785 bool IsSub = ExtOpc == Hexagon::S4_subaddi; in replaceInstrExpr() local
1786 Register Rs = MI.getOperand(IsSub ? 3 : 2); in replaceInstrExpr()
1787 ExtValue V = MI.getOperand(IsSub ? 2 : 3); in replaceInstrExpr()
1788 assert(EV == V && Rs == Ex.Rs && IsSub == Ex.Neg && "Initializer mismatch"); in replaceInstrExpr()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/ARM/ |
| H A D | ARMBaseInstrInfo.cpp | 3062 bool IsSub = Opc == ARM::SUBrr || Opc == ARM::t2SUBrr || in optimizeCompareInstr() local
3067 if (!IsSub || in optimizeCompareInstr()
3074 ARMCC::CondCodes NewCC = (IsSub ? getSwappedCondition(CC) : getCmpToAddCondition(CC)); in optimizeCompareInstr()
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| H A D | ARMISelDAGToDAG.cpp | 2708 bool IsSub = SDValueToConstBool(N->getOperand(2)); in SelectBaseMVE_VMLLDAV() local
2711 assert(!IsSub && in SelectBaseMVE_VMLLDAV()
2726 if (IsSub) in SelectBaseMVE_VMLLDAV()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/ |
| H A D | AArch64InstrInfo.cpp | 7926 bool IsSub = Pattern == AArch64MachineCombinerPattern::MULSUBWI_OP1 || in genAlternativeCodeSequence() local
7928 uint64_t UImm = SignExtend64(IsSub ? -Imm : Imm, BitSize); in genAlternativeCodeSequence()
7936 .addImm(IsSub ? -Imm : Imm); in genAlternativeCodeSequence()
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| /freebsd/contrib/llvm-project/clang/lib/Sema/ |
| H A D | SemaChecking.cpp | 14262 bool IsSub, ASTContext &Ctx) { in getAlignmentAndOffsetFromBinAddOrSub() argument
14276 if (IsSub) in getAlignmentAndOffsetFromBinAddOrSub()
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| /freebsd/contrib/llvm-project/llvm/lib/Analysis/ |
| H A D | ScalarEvolution.cpp | 2350 bool IsSub = (BinOp == Instruction::Sub); in willNotOverflow() local
2353 bool OverflowDown = IsSub ^ IsNegativeConst; in willNotOverflow()
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| /freebsd/contrib/llvm-project/clang/lib/AST/ |
| H A D | ExprConstant.cpp | 14181 bool IsSub) { in addOrSubLValueAsInteger() argument
14189 Offset = CharUnits::fromQuantity(IsSub ? Offset64 - Index64 in addOrSubLValueAsInteger()
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