| /freebsd/contrib/llvm-project/llvm/lib/Target/SystemZ/ |
| H A D | SystemZISelLowering.h | 664 bool IsSignaling = false) const; 667 bool IsSignaling) const;
|
| H A D | SystemZISelLowering.cpp | 3059 bool IsSignaling = false) { in getCmp() argument 3080 else if (!IsSignaling) in getCmp() 3330 bool IsSignaling) const { in lowerVectorSETCC() 3333 assert (!IsSignaling || Chain); in lowerVectorSETCC() 3334 CmpMode Mode = IsSignaling ? CmpMode::SignalingFP : in lowerVectorSETCC() 3419 bool IsSignaling) const { in lowerSTRICT_FSETCC() 3428 Chain, IsSignaling); in lowerSTRICT_FSETCC() 3432 Comparison C(getCmp(DAG, CmpOp0, CmpOp1, CC, DL, Chain, IsSignaling)); in lowerSTRICT_FSETCC()
|
| /freebsd/contrib/llvm-project/llvm/lib/IR/ |
| H A D | IRBuilder.cpp | 1050 MDNode *FPMathTag, bool IsSignaling) { in CreateFCmpHelper() argument 1052 auto ID = IsSignaling ? Intrinsic::experimental_constrained_fcmps in CreateFCmpHelper()
|
| /freebsd/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | LegalizeFloatTypes.cpp | 2116 bool IsSignaling) { in FloatExpandSetCCOperands() argument 2130 RHSHi, ISD::SETOEQ, Chain, IsSignaling); in FloatExpandSetCCOperands() 2133 RHSLo, CCCode, OutputChain, IsSignaling); in FloatExpandSetCCOperands() 2138 ISD::SETUNE, OutputChain, IsSignaling); in FloatExpandSetCCOperands() 2141 RHSHi, CCCode, OutputChain, IsSignaling); in FloatExpandSetCCOperands()
|
| H A D | LegalizeVectorOps.cpp | 1700 bool IsSignaling = Node->getOpcode() == ISD::STRICT_FSETCCS; in ExpandSETCC() local 1729 EVL, NeedInvert, dl, Chain, IsSignaling); in ExpandSETCC()
|
| H A D | LegalizeTypes.h | 715 SDValue &Chain, bool IsSignaling = false);
|
| H A D | TargetLowering.cpp | 307 bool IsSignaling) const { in softenSetCCOperands() 11540 bool IsSignaling) const { in LegalizeSetCCCondCode() 11654 SetCC1 = DAG.getSetCC(dl, VT, LHS, RHS, CC1, Chain, IsSignaling); in LegalizeSetCCCondCode() 11655 SetCC2 = DAG.getSetCC(dl, VT, LHS, RHS, CC2, Chain, IsSignaling); in LegalizeSetCCCondCode() 11663 SetCC1 = DAG.getSetCC(dl, VT, LHS, LHS, CC1, Chain, IsSignaling); in LegalizeSetCCCondCode() 11664 SetCC2 = DAG.getSetCC(dl, VT, RHS, RHS, CC2, Chain, IsSignaling); in LegalizeSetCCCondCode()
|
| H A D | LegalizeDAG.cpp | 4101 bool IsSignaling = Node->getOpcode() == ISD::STRICT_FSETCCS; in ExpandNode() local 4114 Chain, IsSignaling); in ExpandNode()
|
| /freebsd/contrib/llvm-project/llvm/lib/Support/ |
| H A D | APFloat.cpp | 3175 bool IsSignaling = str.front() == 's' || str.front() == 'S'; in convertFromStringSpecials() local 3176 if (IsSignaling) { in convertFromStringSpecials() 3187 makeNaN(IsSignaling, IsNegative); in convertFromStringSpecials() 3213 makeNaN(IsSignaling, IsNegative, &Payload); in convertFromStringSpecials()
|
| /freebsd/contrib/llvm-project/clang/lib/CodeGen/ |
| H A D | CGBuiltin.cpp | 14404 bool IsSignaling) { in EmitX86BuiltinExpr() argument 14407 if (IsSignaling) in EmitX86BuiltinExpr() 16313 bool IsSignaling; in EmitX86BuiltinExpr() local 16317 case 0x00: Pred = FCmpInst::FCMP_OEQ; IsSignaling = false; break; in EmitX86BuiltinExpr() 16318 case 0x01: Pred = FCmpInst::FCMP_OLT; IsSignaling = true; break; in EmitX86BuiltinExpr() 16319 case 0x02: Pred = FCmpInst::FCMP_OLE; IsSignaling = true; break; in EmitX86BuiltinExpr() 16320 case 0x03: Pred = FCmpInst::FCMP_UNO; IsSignaling = false; break; in EmitX86BuiltinExpr() 16321 case 0x04: Pred = FCmpInst::FCMP_UNE; IsSignaling = false; break; in EmitX86BuiltinExpr() 16322 case 0x05: Pred = FCmpInst::FCMP_UGE; IsSignaling = true; break; in EmitX86BuiltinExpr() 16323 case 0x06: Pred = FCmpInst::FCMP_UGT; IsSignaling = true; break; in EmitX86BuiltinExpr() [all …]
|
| H A D | CGExprScalar.cpp | 881 llvm::CmpInst::Predicate FCmpOpc, bool IsSignaling); 4601 bool IsSignaling) { in EmitCompare() argument 4697 if (!IsSignaling) in EmitCompare()
|
| /freebsd/contrib/llvm-project/llvm/include/llvm/CodeGen/ |
| H A D | SelectionDAG.h | 1233 bool IsSignaling = false) { 1241 return getNode(IsSignaling ? ISD::STRICT_FSETCCS : ISD::STRICT_FSETCC, DL,
|
| H A D | TargetLowering.h | 3891 bool IsSignaling = false) const; 5536 SDValue &Chain, bool IsSignaling = false) const;
|
| /freebsd/contrib/llvm-project/llvm/lib/Target/X86/ |
| H A D | X86ISelDAGToDAG.cpp | 5934 bool IsSignaling = Node->getOpcode() == X86ISD::STRICT_FCMPS; in Select() local 5940 Opc = IsSignaling ? X86::COM_Fpr32 : X86::UCOM_Fpr32; in Select() 5943 Opc = IsSignaling ? X86::COM_Fpr64 : X86::UCOM_Fpr64; in Select() 5946 Opc = IsSignaling ? X86::COM_Fpr80 : X86::UCOM_Fpr80; in Select()
|
| H A D | X86ISelLowering.cpp | 23264 bool IsSignaling = Op.getOpcode() == ISD::STRICT_FSETCCS; in LowerVSETCC() local 23299 if (IsStrict && IsAlwaysSignaling && !IsSignaling) in LowerVSETCC() 23303 if (IsStrict && !IsAlwaysSignaling && IsSignaling) { in LowerVSETCC() 23363 SSECC |= (IsAlwaysSignaling ^ IsSignaling) << 4; in LowerVSETCC() 23917 bool IsSignaling = Op.getOpcode() == ISD::STRICT_FSETCCS; in LowerSETCC() local 23919 DAG.getNode(IsSignaling ? X86ISD::STRICT_FCMPS : X86ISD::STRICT_FCMP, in LowerSETCC()
|
| /freebsd/contrib/llvm-project/llvm/include/llvm/IR/ |
| H A D | IRBuilder.h | 2390 bool IsSignaling);
|
| /freebsd/contrib/llvm-project/clang/include/clang/Basic/ |
| H A D | Builtins.td | 632 def IsSignaling : Builtin {
|
| /freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/ |
| H A D | AArch64ISelLowering.cpp | 3436 bool IsSignaling) { in emitStrictFPComparison() argument 3451 IsSignaling ? AArch64ISD::STRICT_FCMPE : AArch64ISD::STRICT_FCMP; in emitStrictFPComparison() 10315 bool IsSignaling = Op.getOpcode() == ISD::STRICT_FSETCCS; in LowerSETCC() local 10334 IsSignaling); in LowerSETCC() 10364 Cmp = emitStrictFPComparison(LHS, RHS, dl, DAG, Chain, IsSignaling); in LowerSETCC()
|
| /freebsd/contrib/llvm-project/llvm/lib/Target/ARM/ |
| H A D | ARMISelLowering.cpp | 10520 bool IsSignaling = Op.getOpcode() == ISD::STRICT_FSETCCS; in LowerFSETCC() local 10526 DAG, LHS.getValueType(), LHS, RHS, CC, dl, LHS, RHS, Chain, IsSignaling); in LowerFSETCC() 10548 SDValue Cmp = getVFPCmp(LHS, RHS, DAG, dl, IsSignaling); in LowerFSETCC() 10552 Cmp = getVFPCmp(LHS, RHS, DAG, dl, IsSignaling); in LowerFSETCC()
|