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Searched refs:IsSignaling (Results 1 – 20 of 20) sorted by relevance

/freebsd/contrib/llvm-project/clang/lib/CodeGen/TargetBuiltins/
H A DX86.cpp783 bool IsSignaling) { in EmitX86BuiltinExpr() argument
786 if (IsSignaling) in EmitX86BuiltinExpr()
2706 bool IsSignaling; in EmitX86BuiltinExpr() local
2710 case 0x00: Pred = FCmpInst::FCMP_OEQ; IsSignaling = false; break; in EmitX86BuiltinExpr()
2711 case 0x01: Pred = FCmpInst::FCMP_OLT; IsSignaling = true; break; in EmitX86BuiltinExpr()
2712 case 0x02: Pred = FCmpInst::FCMP_OLE; IsSignaling = true; break; in EmitX86BuiltinExpr()
2713 case 0x03: Pred = FCmpInst::FCMP_UNO; IsSignaling = false; break; in EmitX86BuiltinExpr()
2714 case 0x04: Pred = FCmpInst::FCMP_UNE; IsSignaling = false; break; in EmitX86BuiltinExpr()
2715 case 0x05: Pred = FCmpInst::FCMP_UGE; IsSignaling = true; break; in EmitX86BuiltinExpr()
2716 case 0x06: Pred = FCmpInst::FCMP_UGT; IsSignaling = true; break; in EmitX86BuiltinExpr()
[all …]
/freebsd/contrib/llvm-project/libc/src/__support/FPUtil/
H A DBasicOperations.h361 template <bool IsSignaling, typename T>
369 if (!IsSignaling && pl_bits.is_zero()) { in setpayload()
386 if constexpr (IsSignaling) in setpayload()
/freebsd/contrib/llvm-project/llvm/lib/Target/SystemZ/
H A DSystemZISelLowering.h688 bool IsSignaling = false) const;
691 bool IsSignaling) const;
H A DSystemZISelLowering.cpp3446 bool IsSignaling = false) { in getCmp() argument
3467 else if (!IsSignaling) in getCmp()
3723 bool IsSignaling) const { in lowerVectorSETCC()
3726 assert (!IsSignaling || Chain); in lowerVectorSETCC()
3727 CmpMode Mode = IsSignaling ? CmpMode::SignalingFP : in lowerVectorSETCC()
3824 bool IsSignaling) const { in lowerSTRICT_FSETCC()
3833 Chain, IsSignaling); in lowerSTRICT_FSETCC()
3837 Comparison C(getCmp(DAG, CmpOp0, CmpOp1, CC, DL, Chain, IsSignaling)); in lowerSTRICT_FSETCC()
/freebsd/contrib/llvm-project/llvm/lib/IR/
H A DIRBuilder.cpp976 bool IsSignaling) { in CreateFCmpHelper() argument
978 auto ID = IsSignaling ? Intrinsic::experimental_constrained_fcmps in CreateFCmpHelper()
/freebsd/contrib/llvm-project/llvm/lib/Support/
H A DAPFloat.cpp3278 bool IsSignaling = str.consume_front_insensitive("s"); in convertFromStringSpecials() local
3279 if (IsSignaling) { in convertFromStringSpecials()
3287 makeNaN(IsSignaling, IsNegative); in convertFromStringSpecials()
3314 makeNaN(IsSignaling, IsNegative, &Payload); in convertFromStringSpecials()
/freebsd/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/
H A DLegalizeFloatTypes.cpp2332 bool IsSignaling) { in FloatExpandSetCCOperands() argument
2346 RHSHi, ISD::SETOEQ, Chain, IsSignaling); in FloatExpandSetCCOperands()
2349 RHSLo, CCCode, OutputChain, IsSignaling); in FloatExpandSetCCOperands()
2354 ISD::SETUNE, OutputChain, IsSignaling); in FloatExpandSetCCOperands()
2357 RHSHi, CCCode, OutputChain, IsSignaling); in FloatExpandSetCCOperands()
H A DLegalizeVectorOps.cpp2028 bool IsSignaling = Node->getOpcode() == ISD::STRICT_FSETCCS; in ExpandSETCC() local
2057 EVL, NeedInvert, dl, Chain, IsSignaling); in ExpandSETCC()
H A DLegalizeTypes.h747 SDValue &Chain, bool IsSignaling = false);
H A DTargetLowering.cpp321 bool IsSignaling) const { in softenSetCCOperands()
12082 bool IsSignaling) const { in LegalizeSetCCCondCode()
12235 SetCC1 = DAG.getSetCC(dl, VT, LHS, RHS, CC1, Chain, IsSignaling); in LegalizeSetCCCondCode()
12236 SetCC2 = DAG.getSetCC(dl, VT, LHS, RHS, CC2, Chain, IsSignaling); in LegalizeSetCCCondCode()
12244 SetCC1 = DAG.getSetCC(dl, VT, LHS, LHS, CC1, Chain, IsSignaling); in LegalizeSetCCCondCode()
12245 SetCC2 = DAG.getSetCC(dl, VT, RHS, RHS, CC2, Chain, IsSignaling); in LegalizeSetCCCondCode()
H A DLegalizeDAG.cpp4239 bool IsSignaling = Node->getOpcode() == ISD::STRICT_FSETCCS; in ExpandNode() local
4252 Chain, IsSignaling); in ExpandNode()
/freebsd/contrib/llvm-project/llvm/include/llvm/CodeGen/
H A DSelectionDAG.h1311 bool IsSignaling = false) {
1319 return getNode(IsSignaling ? ISD::STRICT_FSETCCS : ISD::STRICT_FSETCC, DL,
H A DTargetLowering.h4046 bool IsSignaling = false) const;
5728 SDValue &Chain, bool IsSignaling = false) const;
/freebsd/contrib/llvm-project/llvm/lib/Target/X86/
H A DX86ISelDAGToDAG.cpp6091 bool IsSignaling = Node->getOpcode() == X86ISD::STRICT_FCMPS; in Select() local
6097 Opc = IsSignaling ? X86::COM_Fpr32 : X86::UCOM_Fpr32; in Select()
6100 Opc = IsSignaling ? X86::COM_Fpr64 : X86::UCOM_Fpr64; in Select()
6103 Opc = IsSignaling ? X86::COM_Fpr80 : X86::UCOM_Fpr80; in Select()
H A DX86ISelLowering.cpp24034 bool IsSignaling = Op.getOpcode() == ISD::STRICT_FSETCCS; in LowerVSETCC() local
24069 if (IsStrict && IsAlwaysSignaling && !IsSignaling) in LowerVSETCC()
24073 if (IsStrict && !IsAlwaysSignaling && IsSignaling) { in LowerVSETCC()
24133 SSECC |= (IsAlwaysSignaling ^ IsSignaling) << 4; in LowerVSETCC()
24692 bool IsSignaling = Op.getOpcode() == ISD::STRICT_FSETCCS; in LowerSETCC() local
24694 DAG.getNode(IsSignaling ? X86ISD::STRICT_FCMPS : X86ISD::STRICT_FCMP, in LowerSETCC()
/freebsd/contrib/llvm-project/clang/lib/CodeGen/
H A DCGExprScalar.cpp919 llvm::CmpInst::Predicate FCmpOpc, bool IsSignaling);
4916 bool IsSignaling) { in EmitCompare() argument
5012 if (!IsSignaling) in EmitCompare()
/freebsd/contrib/llvm-project/llvm/include/llvm/IR/
H A DIRBuilder.h2484 FMFSource FMFSource, bool IsSignaling);
/freebsd/contrib/llvm-project/clang/include/clang/Basic/
H A DBuiltins.td650 def IsSignaling : Builtin {
/freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/
H A DAArch64ISelLowering.cpp3429 bool IsSignaling) { in emitStrictFPComparison() argument
3443 IsSignaling ? AArch64ISD::STRICT_FCMPE : AArch64ISD::STRICT_FCMP; in emitStrictFPComparison()
11001 bool IsSignaling = Op.getOpcode() == ISD::STRICT_FSETCCS; in LowerSETCC() local
11020 IsSignaling); in LowerSETCC()
11053 Cmp = emitStrictFPComparison(LHS, RHS, DL, DAG, Chain, IsSignaling); in LowerSETCC()
/freebsd/contrib/llvm-project/llvm/lib/Target/ARM/
H A DARMISelLowering.cpp10578 bool IsSignaling = Op.getOpcode() == ISD::STRICT_FSETCCS; in LowerFSETCC() local
10584 Chain, IsSignaling); in LowerFSETCC()
10600 SDValue Cmp = getVFPCmp(LHS, RHS, DAG, dl, IsSignaling); in LowerFSETCC()