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Searched refs:IsSRA (Results 1 – 11 of 11) sorted by relevance

/freebsd/contrib/llvm-project/llvm/lib/Target/Xtensa/
H A DXtensaISelLowering.h196 SDValue LowerShiftRightParts(SDValue Op, SelectionDAG &DAG, bool IsSRA) const;
H A DXtensaISelLowering.cpp1374 bool IsSRA) const { in LowerShiftRightParts()
1396 unsigned ShiftRightOp = IsSRA ? ISD::SRA : ISD::SRL; in LowerShiftRightParts()
1409 if (IsSRA) { in LowerShiftRightParts()
/freebsd/contrib/llvm-project/llvm/lib/Target/M68k/
H A DM68kISelLowering.h180 SDValue LowerShiftRightParts(SDValue Op, SelectionDAG &DAG, bool IsSRA) const;
H A DM68kISelLowering.cpp3472 bool IsSRA) const { in LowerShiftRightParts()
3495 unsigned ShiftRightOp = IsSRA ? ISD::SRA : ISD::SRL; in LowerShiftRightParts()
3515 IsSRA ? DAG.getNode(ISD::SRA, DL, VT, Hi, RegisterSizeMinus1) : Zero; in LowerShiftRightParts()
/freebsd/contrib/llvm-project/llvm/lib/Target/LoongArch/
H A DLoongArchISelLowering.h357 SDValue lowerShiftRightParts(SDValue Op, SelectionDAG &DAG, bool IsSRA) const;
H A DLoongArchISelLowering.cpp3729 bool IsSRA) const { in lowerShiftRightParts()
3752 unsigned ShiftRightOp = IsSRA ? ISD::SRA : ISD::SRL; in lowerShiftRightParts()
3770 IsSRA ? DAG.getNode(ISD::SRA, DL, VT, Hi, GRLenMinus1) : Zero; in lowerShiftRightParts()
/freebsd/contrib/llvm-project/llvm/lib/Target/Mips/
H A DMipsISelLowering.h591 bool IsSRA) const;
H A DMipsISelLowering.cpp2787 bool IsSRA) const { in lowerShiftRightParts()
2814 SDValue ShiftRightHi = DAG.getNode(IsSRA ? ISD::SRA : ISD::SRL, in lowerShiftRightParts()
2826 IsSRA ? Ext : DAG.getConstant(0, DL, VT), Or, in lowerShiftRightParts()
2832 IsSRA ? Ext : DAG.getConstant(0, DL, VT), ShiftRightHi); in lowerShiftRightParts()
/freebsd/contrib/llvm-project/llvm/lib/Target/RISCV/
H A DRISCVISelLowering.h506 SDValue lowerShiftRightParts(SDValue Op, SelectionDAG &DAG, bool IsSRA) const;
H A DRISCVISelLowering.cpp9457 bool IsSRA) const { in lowerShiftRightParts()
9480 unsigned ShiftRightOp = IsSRA ? ISD::SRA : ISD::SRL; in lowerShiftRightParts()
9497 IsSRA ? DAG.getNode(ISD::SRA, DL, VT, Hi, XLenMinus1) : Zero; in lowerShiftRightParts()
/freebsd/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/
H A DTargetLowering.cpp8343 bool IsSRA = Node->getOpcode() == ISD::SRA_PARTS; in expandShiftParts() local
8357 SDValue Tmp1 = IsSRA ? DAG.getNode(ISD::SRA, dl, VT, ShOpHi, in expandShiftParts()
8367 Tmp3 = DAG.getNode(IsSRA ? ISD::SRA : ISD::SRL, dl, VT, ShOpHi, SafeShAmt); in expandShiftParts()