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Searched refs:IsNeg (Results 1 – 19 of 19) sorted by relevance

/freebsd/contrib/llvm-project/llvm/include/llvm/Support/
H A DScaledNumber.h439 static int64_t joinSigned(uint64_t U, bool IsNeg) { in joinSigned() argument
441 return IsNeg ? INT64_MIN : INT64_MAX; in joinSigned()
442 return IsNeg ? -int64_t(U) : int64_t(U); in joinSigned()
/freebsd/contrib/llvm-project/llvm/utils/TableGen/
H A DAsmWriterEmitter.cpp1048 bool IsNeg = false; in EmitPrintAliasInstruction() local
1054 IsNeg = true; in EmitPrintAliasInstruction()
1062 IsNeg ? "Neg" : "", Namespace, Arg->getAsString()))); in EmitPrintAliasInstruction()
/freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/
H A DAArch64AsmPrinter.cpp2231 const bool IsNeg = Offset < 0; in LowerMOVaddrPAC() local
2236 MCInstBuilder(IsNeg ? AArch64::SUBXri : AArch64::ADDXri) in LowerMOVaddrPAC()
2244 EmitAndIncrement(MCInstBuilder(IsNeg ? AArch64::MOVNXi : AArch64::MOVZXi) in LowerMOVaddrPAC()
2246 .addImm((IsNeg ? ~UOffset : UOffset) & 0xffff) in LowerMOVaddrPAC()
2248 auto NeedMovk = [IsNeg, UOffset](int BitPos) -> bool { in LowerMOVaddrPAC()
2251 if (!IsNeg) in LowerMOVaddrPAC()
/freebsd/contrib/llvm-project/llvm/lib/Transforms/InstCombine/
H A DInstCombineMulDivRem.cpp494 Value *IsNeg = Builder.CreateIsNeg(X, "isneg"); in visitMul() local
495 return SelectInst::Create(IsNeg, NegC, ConstantInt::getNullValue(Ty)); in visitMul()
505 Value *IsNeg = Builder.CreateIsNeg(X, "isneg"); in visitMul() local
506 return SelectInst::Create(IsNeg, Y, ConstantInt::getNullValue(Ty)); in visitMul()
H A DInstCombineAndOrXor.cpp2783 Value *IsNeg = Builder.CreateIsNeg(X, "isneg"); in visitAnd() local
2784 return SelectInst::Create(IsNeg, Y, ConstantInt::getNullValue(Ty)); in visitAnd()
2792 Value *IsNeg = Builder.CreateIsNeg(X, "isneg"); in visitAnd() local
2793 return SelectInst::Create(IsNeg, ConstantInt::getNullValue(Ty), Y); in visitAnd()
4326 Value *IsNeg = Builder.CreateIsNeg(A); in canonicalizeAbs() local
4332 return SelectInst::Create(IsNeg, NegA, A); in canonicalizeAbs()
H A DInstCombineAddSub.cpp2573 Value *IsNeg = Builder.CreateIsNeg(A); in visitSub() local
2578 return SelectInst::Create(IsNeg, NegA, A); in visitSub()
H A DInstCombineSelect.cpp1874 Value *IsNeg = Builder.CreateIsNeg(CmpLHS, ICI->getName()); in foldSelectInstWithICmp() local
1875 replaceOperand(SI, 0, IsNeg); in foldSelectInstWithICmp()
/freebsd/contrib/llvm-project/llvm/lib/MC/MCParser/
H A DAsmParser.cpp3256 bool IsNeg = false; in parseRealValue() local
3259 IsNeg = true; in parseRealValue()
3284 if (IsNeg) in parseRealValue()
H A DMasmParser.cpp3817 bool IsNeg = false; in parseRealValue() local
3822 IsNeg = true; in parseRealValue()
3865 if (IsNeg) in parseRealValue()
/freebsd/contrib/llvm-project/llvm/lib/Transforms/Utils/
H A DSimplifyLibCalls.cpp3056 Value *IsNeg = B.CreateIsNeg(X); in optimizeAbs() local
3058 return B.CreateSelect(IsNeg, NegX, X); in optimizeAbs()
/freebsd/contrib/llvm-project/llvm/lib/Frontend/OpenMP/
H A DOMPIRBuilder.cpp3934 Value *IsNeg = Builder.CreateICmpSLT(Step, Zero); in createCanonicalLoop() local
3935 Incr = Builder.CreateSelect(IsNeg, Builder.CreateNeg(Step), Step); in createCanonicalLoop()
3936 Value *LB = Builder.CreateSelect(IsNeg, Stop, Start); in createCanonicalLoop()
3937 Value *UB = Builder.CreateSelect(IsNeg, Start, Stop); in createCanonicalLoop()
/freebsd/contrib/llvm-project/llvm/lib/Target/Hexagon/
H A DHexagonISelLoweringHVX.cpp2877 SDValue IsNeg = DAG.getSetCC(dl, PredTy, Op0, Zero, ISD::SETLT); in ExpandHvxIntToFp()
2879 SDValue Sign = DAG.getNode(ISD::VSELECT, dl, InpTy, {IsNeg, M80, Zero}); in ExpandHvxIntToFp()
2878 SDValue IsNeg = DAG.getSetCC(dl, PredTy, Op0, Zero, ISD::SETLT); ExpandHvxIntToFp() local
/freebsd/contrib/llvm-project/llvm/lib/Target/PowerPC/
H A DPPCISelLowering.cpp18044 auto IsProfitable = [this](bool IsNeg, bool IsAddOne, EVT VT) -> bool { in combineMUL() argument
18068 return IsAddOne && IsNeg ? VT.isVector() : true; in combineMUL()
18076 bool IsNeg = MulAmt.isNegative(); in combineMUL() local
18083 if (!IsProfitable(IsNeg, true, VT)) in combineMUL()
18092 if (!IsNeg) in combineMUL()
18100 if (!IsProfitable(IsNeg, false, VT)) in combineMUL()
18108 if (!IsNeg) in combineMUL()
/freebsd/contrib/llvm-project/llvm/lib/CodeGen/GlobalISel/
H A DCombinerHelper.cpp5547 auto IsNeg = Builder.buildICmp(CmpInst::Predicate::ICMP_SLT, CCVT, RHS, Zero); in applySDivByPow2() local
5548 Builder.buildSelect(MI.getOperand(0).getReg(), IsNeg, Neg, AShr); in applySDivByPow2()
/freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/AsmParser/
H A DAMDGPUAsmParser.cpp4806 bool IsNeg = StringRef(BLGPLoc.getPointer()).starts_with("neg:"); in validateBLGP() local
4819 if (IsNeg == UsesNeg) in validateBLGP()
/freebsd/contrib/llvm-project/llvm/lib/Target/X86/
H A DX86ISelLowering.cpp19262 SDValue IsNeg = DAG.getSetCC(DL, MVT::v4i64, Src, Zero, ISD::SETLT); in lowerINT_TO_FP_vXi64() local
19263 SDValue SignSrc = DAG.getSelect(DL, MVT::v4i64, IsNeg, Sign, Src); in lowerINT_TO_FP_vXi64()
19290 IsNeg = DAG.getNode(ISD::TRUNCATE, DL, MVT::v4i32, IsNeg); in lowerINT_TO_FP_vXi64()
19291 SDValue Cvt = DAG.getSelect(DL, MVT::v4f32, IsNeg, Slow, SignCvt); in lowerINT_TO_FP_vXi64()
33194 SDValue IsNeg = DAG.getSetCC(dl, MVT::v2i64, Src, Zero, ISD::SETLT); in ReplaceNodeResults() local
33195 SDValue SignSrc = DAG.getSelect(dl, SrcVT, IsNeg, Sign, Src); in ReplaceNodeResults()
33218 IsNeg = DAG.getBitcast(MVT::v4i32, IsNeg); in ReplaceNodeResults()
33219 IsNeg = in ReplaceNodeResults()
33220 DAG.getVectorShuffle(MVT::v4i32, dl, IsNeg, IsNeg, {1, 3, -1, -1}); in ReplaceNodeResults()
33221 SDValue Cvt = DAG.getSelect(dl, MVT::v4f32, IsNeg, Slow, SignCvt); in ReplaceNodeResults()
/freebsd/contrib/llvm-project/clang/lib/CodeGen/
H A DCGBuiltin.cpp3214 Value *IsNeg = Builder.CreateICmpSLT(ArgValue, Zero, "isneg"); in EmitBuiltinExpr() local
3216 Value *Tmp = Builder.CreateSelect(IsNeg, Inverse, ArgValue); in EmitBuiltinExpr()
4036 Value *IsNeg = EmitSignBit(*this, Arg); in EmitBuiltinExpr() local
4042 Value *SignResult = Builder.CreateSelect(IsNeg, NegativeOne, One); in EmitBuiltinExpr()
/freebsd/contrib/llvm-project/llvm/lib/Target/ARM/
H A DARMISelLowering.cpp19534 bool IsNeg = false; in isLegalT2AddressImmediate() local
19536 IsNeg = true; in isLegalT2AddressImmediate()
19567 if (IsNeg) in isLegalT2AddressImmediate()
/freebsd/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/
H A DDAGCombiner.cpp4836 SDValue IsNeg = DAG.getSetCC(DL, CCVT, N1, Zero, ISD::SETLT); in visitSDIVLike() local
4837 SDValue Res = DAG.getSelect(DL, VT, IsNeg, Sub, Sra); in visitSDIVLike()