| /freebsd/contrib/llvm-project/clang/include/clang/Basic/ |
| H A D | riscv_vector.td | 60 if (IsMasked) {
79 if (IsMasked)
147 if (IsMasked) {
154 if (IsMasked)
185 if (IsMasked) {
192 if (IsMasked)
210 if (IsMasked) {
217 if (IsMasked)
385 if (IsMasked) {
396 if (IsMasked) {
[all …]
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| H A D | riscv_sifive_vector.td | 157 (IsMasked && (PolicyAttrs & RVV_VTA) && (PolicyAttrs & RVV_VMA)) ||
158 (!IsMasked && PolicyAttrs & RVV_VTA));
159 bool HasRoundModeOp = IsMasked ?
163 unsigned Offset = IsMasked ?
169 Operands.push_back(Ops[IsMasked ? 1 : 0]);
174 if (IsMasked)
185 if (IsMasked)
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| /freebsd/contrib/llvm-project/llvm/lib/Target/RISCV/ |
| H A D | RISCVISelDAGToDAG.h | 152 bool IsMasked, bool IsStridedOrIndexed,
156 void selectVLSEG(SDNode *Node, bool IsMasked, bool IsStrided);
157 void selectVLSEGFF(SDNode *Node, bool IsMasked);
158 void selectVLXSEG(SDNode *Node, bool IsMasked, bool IsOrdered);
159 void selectVSSEG(SDNode *Node, bool IsMasked, bool IsStrided);
160 void selectVSXSEG(SDNode *Node, bool IsMasked, bool IsOrdered);
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| H A D | RISCVExpandAtomicPseudoInsts.cpp | 53 bool IsMasked, int Width,
57 AtomicRMWInst::BinOp, bool IsMasked, int Width,
60 MachineBasicBlock::iterator MBBI, bool IsMasked,
390 AtomicRMWInst::BinOp BinOp, bool IsMasked, int Width, in expandAtomicBinOp()
410 if (!IsMasked) in expandAtomicMinMaxOp()
440 AtomicRMWInst::BinOp BinOp, bool IsMasked, int Width, in expandAtomicMinMaxOp()
442 assert(IsMasked == true && in expandAtomicMinMaxOp()
626 MachineBasicBlock &MBB, MachineBasicBlock::iterator MBBI, bool IsMasked, in expandAtomicCmpXchg()
640 Register MaskReg = IsMasked ? MI.getOperand(5).getReg() : Register(); in expandAtomicCmpXchg()
661 static_cast<AtomicOrdering>(MI.getOperand(IsMasked in expandAtomicCmpXchg()
362 expandAtomicBinOp(MachineBasicBlock & MBB,MachineBasicBlock::iterator MBBI,AtomicRMWInst::BinOp BinOp,bool IsMasked,int Width,MachineBasicBlock::iterator & NextMBBI) expandAtomicBinOp() argument
411 expandAtomicMinMaxOp(MachineBasicBlock & MBB,MachineBasicBlock::iterator MBBI,AtomicRMWInst::BinOp BinOp,bool IsMasked,int Width,MachineBasicBlock::iterator & NextMBBI) expandAtomicMinMaxOp() argument
597 expandAtomicCmpXchg(MachineBasicBlock & MBB,MachineBasicBlock::iterator MBBI,bool IsMasked,int Width,MachineBasicBlock::iterator & NextMBBI) expandAtomicCmpXchg() argument
[all...] |
| H A D | RISCVISelDAGToDAG.cpp | 295 bool IsMasked, bool IsStridedOrIndexed, SmallVectorImpl<SDValue> &Operands, in addVectorLoadStoreOperands() argument
308 if (IsMasked) { in addVectorLoadStoreOperands()
328 if (IsMasked) in addVectorLoadStoreOperands()
339 void RISCVDAGToDAGISel::selectVLSEG(SDNode *Node, bool IsMasked, in selectVLSEG() argument
356 addVectorLoadStoreOperands(Node, Log2SEW, DL, CurOp, IsMasked, IsStrided, in selectVLSEG()
360 RISCV::getVLSEGPseudo(NF, IsMasked, IsStrided, /*FF*/ false, Log2SEW, in selectVLSEG()
379 void RISCVDAGToDAGISel::selectVLSEGFF(SDNode *Node, bool IsMasked) { in selectVLSEGFF() argument
396 addVectorLoadStoreOperands(Node, Log2SEW, DL, CurOp, IsMasked, in selectVLSEGFF()
401 RISCV::getVLSEGPseudo(NF, IsMasked, /*Strided*/ false, /*FF*/ true, in selectVLSEGFF()
421 void RISCVDAGToDAGISel::selectVLXSEG(SDNode *Node, bool IsMasked, in selectVLXSEG() argument
[all …]
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| H A D | RISCVISelLowering.cpp | 8837 bool IsMasked = NumOps == 7; in lowerVectorIntrinsicScalars()
8894 if (IsMasked) in lowerVectorIntrinsicScalars()
8915 if (!IsMasked) in lowerVectorIntrinsicScalars()
8835 bool IsMasked = NumOps == 7; lowerVectorIntrinsicScalars() local
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| /freebsd/contrib/llvm-project/llvm/lib/Analysis/ |
| H A D | VFABIDemangling.cpp | |
| /freebsd/contrib/llvm-project/llvm/lib/Target/LoongArch/ |
| H A D | LoongArchExpandAtomicPseudoInsts.cpp | 52 bool IsMasked, int Width,
56 AtomicRMWInst::BinOp, bool IsMasked, int Width,
59 MachineBasicBlock::iterator MBBI, bool IsMasked,
302 AtomicRMWInst::BinOp BinOp, bool IsMasked, int Width, in doMaskedAtomicBinOpExpansion()
322 if (IsMasked) in expandAtomicBinOp()
351 AtomicRMWInst::BinOp BinOp, bool IsMasked, int Width, in insertSext()
353 assert(IsMasked == true && in insertSext()
470 MachineBasicBlock &MBB, MachineBasicBlock::iterator MBBI, bool IsMasked, in expandAtomicMinMaxOp()
502 if (!IsMasked) { in expandAtomicCmpXchg()
575 static_cast<AtomicOrdering>(MI.getOperand(IsMasked in expandAtomicCmpXchg()
314 expandAtomicBinOp(MachineBasicBlock & MBB,MachineBasicBlock::iterator MBBI,AtomicRMWInst::BinOp BinOp,bool IsMasked,int Width,MachineBasicBlock::iterator & NextMBBI) expandAtomicBinOp() argument
363 expandAtomicMinMaxOp(MachineBasicBlock & MBB,MachineBasicBlock::iterator MBBI,AtomicRMWInst::BinOp BinOp,bool IsMasked,int Width,MachineBasicBlock::iterator & NextMBBI) expandAtomicMinMaxOp() argument
493 expandAtomicCmpXchg(MachineBasicBlock & MBB,MachineBasicBlock::iterator MBBI,bool IsMasked,int Width,MachineBasicBlock::iterator & NextMBBI) expandAtomicCmpXchg() argument
[all...] |
| /freebsd/contrib/llvm-project/clang/lib/Support/ |
| H A D | RISCVVIntrinsicUtils.cpp | 977 StringRef OverloadedSuffix, StringRef IRName, bool IsMasked, in RVVIntrinsic() argument
982 : IRName(IRName), IsMasked(IsMasked), in RVVIntrinsic()
999 updateNamesAndPolicy(IsMasked, hasPolicy(), Name, BuiltinName, OverloadedName, in RVVIntrinsic()
1009 if ((IsMasked && hasMaskedOffOperand()) || in RVVIntrinsic()
1010 (!IsMasked && hasPassthruOperand())) { in RVVIntrinsic()
1039 llvm::ArrayRef<PrototypeDescriptor> Prototype, bool IsMasked, in computeBuiltinTypes() argument
1045 if (IsMasked) { in computeBuiltinTypes()
1143 bool IsMasked, bool HasPolicy, std::string &Name, std::string &BuiltinName, in updateNamesAndPolicy() argument
1157 if (IsMasked) { in updateNamesAndPolicy()
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| /freebsd/contrib/llvm-project/clang/include/clang/Support/ |
| H A D | RISCVVIntrinsicUtils.h | 389 bool IsMasked; variable
407 llvm::StringRef IRName, bool IsMasked, bool HasMaskedOffOperand,
430 bool isMasked() const { return IsMasked; } in isMasked()
469 bool IsMasked, bool HasMaskedOffOperand, bool HasVL,
477 static void updateNamesAndPolicy(bool IsMasked, bool HasPolicy,
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| /freebsd/sys/contrib/dev/acpica/components/events/ |
| H A D | evgpe.c | 266 BOOLEAN IsMasked) in AcpiEvMaskGpe() argument
285 if (IsMasked) in AcpiEvMaskGpe()
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| H A D | evxfgpe.c | 443 BOOLEAN IsMasked) in ACPI_EXPORT_SYMBOL()
464 Status = AcpiEvMaskGpe (GpeEventInfo, IsMasked); in ACPI_EXPORT_SYMBOL()
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| /freebsd/sys/contrib/dev/acpica/include/ |
| H A D | acevents.h | 244 BOOLEAN IsMasked);
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| H A D | acpixf.h | 1081 BOOLEAN IsMasked))
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| /freebsd/contrib/llvm-project/llvm/lib/Transforms/Vectorize/ |
| H A D | VPlan.h | 2456 bool IsMasked = false; variable
2459 assert(!IsMasked && "cannot re-set mask"); in setMask()
2463 IsMasked = true; in setMask()
2502 bool isMasked() const { return IsMasked; } in isMasked()
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| /freebsd/contrib/llvm-project/clang/lib/Sema/ |
| H A D | SemaRISCV.cpp | 371 StringRef OverloadedSuffixStr, bool IsMasked, RVVTypes &Signature, in InitRVVIntrinsic() argument
390 RVVIntrinsic::updateNamesAndPolicy(IsMasked, HasPolicy, Name, BuiltinName, in InitRVVIntrinsic()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/X86/ |
| H A D | X86ISelDAGToDAG.cpp | 4954 bool IsMasked = InMask.getNode() != nullptr; in tryVPTESTM() local
4974 if (IsMasked) { in tryVPTESTM()
4985 IsMasked); in tryVPTESTM()
4991 if (IsMasked) { in tryVPTESTM()
5006 if (IsMasked) in tryVPTESTM()
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| H A D | X86ISelLowering.cpp | 25262 bool IsMasked = false; in getTargetVShiftNode() local
25272 IsMasked = true; in getTargetVShiftNode()
25285 IsMasked = true; in getTargetVShiftNode()
25298 if (!IsMasked && AmtVT.getScalarSizeInBits() < 64) { in getTargetVShiftNode()
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| /freebsd/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | DAGCombiner.cpp | 18401 bool &IsLoad, bool &IsMasked, SDValue &Ptr, in getCombineLoadStoreParts() argument
18426 IsMasked = true; in getCombineLoadStoreParts()
18436 IsMasked = true; in getCombineLoadStoreParts()
18453 bool IsMasked = false; in CombineToPreIndexedLoadStore() local
18455 if (!getCombineLoadStoreParts(N, ISD::PRE_INC, ISD::PRE_DEC, IsLoad, IsMasked, in CombineToPreIndexedLoadStore()
18500 SDValue Val = IsMasked ? cast<MaskedStoreSDNode>(N)->getValue() in CombineToPreIndexedLoadStore()
18579 if (!IsMasked) { in CombineToPreIndexedLoadStore()
18693 bool IsMasked = false; in shouldCombineToPostInc() local
18696 IsMasked, OtherPtr, TLI)) { in shouldCombineToPostInc()
18716 bool &IsMasked, SDValue &Ptr, in getPostIndexedLoadStoreOp() argument
[all …]
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| /freebsd/contrib/llvm-project/llvm/lib/Target/ARM/ |
| H A D | ARMISelLowering.cpp | 19870 bool isSEXTLoad, bool IsMasked, bool isLE, in getMVEIndexedAddressParts() argument
19881 bool CanChangeType = isLE && !IsMasked; in getMVEIndexedAddressParts()
19937 bool IsMasked = false; in getPreIndexedAddressParts() local
19952 IsMasked = true; in getPreIndexedAddressParts()
19957 IsMasked = true; in getPreIndexedAddressParts()
19966 Ptr.getNode(), VT, Alignment, isSEXTLoad, IsMasked, in getPreIndexedAddressParts()
19995 bool IsMasked = false; in getPostIndexedAddressParts() local
20013 IsMasked = true; in getPostIndexedAddressParts()
20019 IsMasked = true; in getPostIndexedAddressParts()
20045 getMVEIndexedAddressParts(Op, VT, Alignment, isSEXTLoad, IsMasked, in getPostIndexedAddressParts()
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| /freebsd/contrib/llvm-project/clang/lib/CodeGen/ |
| H A D | CGBuiltin.cpp | 21894 bool IsMasked = false; in EmitRISCVBuiltinExpr() local
|