/freebsd/contrib/llvm-project/llvm/lib/Target/Hexagon/ |
H A D | HexagonGenMemAbsolute.cpp | 114 bool IsLoad = isValidIndexedLoad(NextOpc, NewOpc); in runOnMachineFunction() local 116 if (!IsLoad && !isValidIndexedStore(NextOpc, NewOpc)) in runOnMachineFunction() 125 RegPos = IsLoad ? 0 : 2; in runOnMachineFunction() 177 << (IsLoad ? "load" : "store") << "\n"; in runOnMachineFunction() 183 if (IsLoad) { // Insert absolute-set load instruction in runOnMachineFunction() 201 if (IsLoad) in runOnMachineFunction()
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/freebsd/contrib/llvm-project/llvm/lib/Target/PowerPC/ |
H A D | PPCVSXSwapRemoval.cpp | 74 unsigned int IsLoad : 1; member 342 SwapVector[VecIdx].IsLoad = 1; in gatherVectorInstructions() 348 SwapVector[VecIdx].IsLoad = 1; in gatherVectorInstructions() 359 SwapVector[VecIdx].IsLoad = 1; in gatherVectorInstructions() 671 else if (SwapVector[EntryIdx].IsLoad && SwapVector[EntryIdx].IsSwap) { in recordUnoptimizableWebs() 682 if (!SwapVector[UseIdx].IsSwap || SwapVector[UseIdx].IsLoad || in recordUnoptimizableWebs() 699 if (SwapVector[UseIdx].IsSwap && !SwapVector[UseIdx].IsLoad && in recordUnoptimizableWebs() 729 if (!SwapVector[DefIdx].IsSwap || SwapVector[DefIdx].IsLoad || in recordUnoptimizableWebs() 780 if (SwapVector[EntryIdx].IsLoad && SwapVector[EntryIdx].IsSwap) { in markSwapsForRemoval() 1006 if (SwapVector[EntryIdx].IsLoad) in dumpSwapVector()
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/freebsd/contrib/llvm-project/llvm/include/llvm/Target/ |
H A D | TargetSelectionDAG.td | 930 bit IsLoad = ?; 1095 let IsLoad = true; 1099 let IsLoad = true; 1105 let IsLoad = true; 1109 let IsLoad = true; 1113 let IsLoad = true; 1118 let IsLoad = true; 1122 let IsLoad = true; 1126 let IsLoad = true; 1130 let IsLoad = true; [all …]
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/freebsd/contrib/llvm-project/clang/lib/StaticAnalyzer/Checkers/ |
H A D | ErrnoChecker.cpp | 36 void checkLocation(SVal Loc, bool IsLoad, const Stmt *S, 134 void ErrnoChecker::checkLocation(SVal Loc, bool IsLoad, const Stmt *S, in checkLocation() argument 147 if (IsLoad) { in checkLocation()
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H A D | CheckerDocumentation.cpp | 157 void checkLocation(SVal Loc, bool IsLoad, const Stmt *S, in checkLocation() argument
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H A D | ObjCSuperDeallocChecker.cpp | 131 void ObjCSuperDeallocChecker::checkLocation(SVal L, bool IsLoad, const Stmt *S, in checkLocation() argument
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H A D | NullabilityChecker.cpp | 106 void checkLocation(SVal Location, bool IsLoad, const Stmt *S, 610 void NullabilityChecker::checkLocation(SVal Location, bool IsLoad, in checkLocation() argument 616 if (!IsLoad) in checkLocation()
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/freebsd/contrib/llvm-project/llvm/lib/Target/NVPTX/ |
H A D | NVPTXInstrFormats.td | 35 bit IsLoad = false; 51 let TSFlags{5...5} = IsLoad;
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/freebsd/contrib/llvm-project/clang/include/clang/Basic/ |
H A D | arm_sve.td | 22 def SVLD1 : MInst<"svld1[_{2}]", "dPc", "csilUcUsUiUlhfd", [IsLoad, VerifyRuntimeMode], … 23 def SVLD1SB : MInst<"svld1sb_{d}", "dPS", "silUsUiUl", [IsLoad, VerifyRuntimeMode], … 24 def SVLD1UB : MInst<"svld1ub_{d}", "dPW", "silUsUiUl", [IsLoad, IsZExtReturn, VerifyRuntimeMo… 25 def SVLD1SH : MInst<"svld1sh_{d}", "dPT", "ilUiUl", [IsLoad, VerifyRuntimeMode], … 26 def SVLD1UH : MInst<"svld1uh_{d}", "dPX", "ilUiUl", [IsLoad, IsZExtReturn, VerifyRuntimeMo… 27 def SVLD1SW : MInst<"svld1sw_{d}", "dPU", "lUl", [IsLoad, VerifyRuntimeMode], … 28 def SVLD1UW : MInst<"svld1uw_{d}", "dPY", "lUl", [IsLoad, IsZExtReturn, VerifyRuntimeMo… 31 …def SVLD1_BF : MInst<"svld1[_{2}]", "dPc", "b", [IsLoad, VerifyRuntimeMode], MemEltTyDe… 32 …def SVLD1_VNUM_BF : MInst<"svld1_vnum[_{2}]", "dPcl", "b", [IsLoad, VerifyRuntimeMode], MemEltTyDe… 36 def SVLD1_VNUM : MInst<"svld1_vnum[_{2}]", "dPcl", "csilUcUsUiUlhfd", [IsLoad, VerifyRuntimeMode]… [all …]
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/freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
H A D | AMDGPUInstructions.td | 477 let IsLoad = 1; 482 let IsLoad = 1; 486 let IsLoad = 1; 490 let IsLoad = 1; 494 let IsLoad = 1; 498 let IsLoad = 1; 502 let IsLoad = 1; 695 let IsLoad = 1; 700 let IsLoad = 1;
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H A D | SIInstrInfo.td | 342 let IsLoad = 1; 347 let IsLoad = 1; 376 let IsLoad = 1; 381 let IsLoad = 1; 386 let IsLoad = 1; 391 let IsLoad = 1; 396 let IsLoad = 1; 401 let IsLoad = 1; 406 let IsLoad = 1; 411 let IsLoad = 1; [all …]
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H A D | AMDGPUInstCombineIntrinsic.cpp | 434 bool IsLoad = true); 1288 int DMaskIdx, bool IsLoad) { in simplifyAMDGCNMemoryIntrinsicDemanded() argument 1290 auto *IIVTy = cast<FixedVectorType>(IsLoad ? II.getType() in simplifyAMDGCNMemoryIntrinsicDemanded() 1402 if (!IsLoad) { in simplifyAMDGCNMemoryIntrinsicDemanded() 1420 if (IsLoad) { in simplifyAMDGCNMemoryIntrinsicDemanded()
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/freebsd/contrib/llvm-project/llvm/lib/Transforms/Vectorize/ |
H A D | LoadStoreVectorizer.cpp | 140 const auto &[UnderlyingObject, AddrSpace, ElementSize, IsLoad] = K; in operator <<() 141 return OS << (IsLoad ? "load" : "store") << " of " << *UnderlyingObject in operator <<() 548 auto Impl = [&](auto IsLoad) { in splitChainByMayAliasInstrs() argument 550 auto [ChainBegin, ChainEnd] = [&](auto IsLoad) { in splitChainByMayAliasInstrs() argument 551 if constexpr (IsLoad()) in splitChainByMayAliasInstrs() 555 }(IsLoad); in splitChainByMayAliasInstrs() 562 if (isSafeToMove<IsLoad>(ChainIt->Inst, NewChain.front().Inst, in splitChainByMayAliasInstrs()
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/freebsd/contrib/llvm-project/lldb/source/Plugins/Process/Utility/ |
H A D | StopInfoMachException.cpp | 40 bool IsLoad; member 63 return PtrauthInstructionInfo{insn->IsAuthenticated(), insn->IsLoad(), in GetPtrauthInstructionInfo() 166 if (ptrauth_info && ptrauth_info->IsAuthenticated && ptrauth_info->IsLoad) { in DeterminePtrauthFailure()
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/freebsd/contrib/llvm-project/llvm/lib/Target/X86/MCTargetDesc/ |
H A D | X86ShuffleDecode.h | 136 void DecodeScalarMoveMask(unsigned NumElts, bool IsLoad,
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H A D | X86ShuffleDecode.cpp | 390 void DecodeScalarMoveMask(unsigned NumElts, bool IsLoad, in DecodeScalarMoveMask() argument 396 ShuffleMask.push_back(IsLoad ? static_cast<int>(SM_SentinelZero) : i); in DecodeScalarMoveMask()
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/freebsd/contrib/llvm-project/clang/lib/StaticAnalyzer/Core/ |
H A D | CheckerManager.cpp | 316 bool IsLoad; member 325 : Checkers(checkers), Loc(loc), IsLoad(isLoad), NodeEx(NodeEx), in CheckLocationContext() 333 ProgramPoint::Kind K = IsLoad ? ProgramPoint::PreLoadKind : in runChecker() 340 checkFn(Loc, IsLoad, BoundEx, C); in runChecker()
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/freebsd/contrib/llvm-project/lldb/include/lldb/Core/ |
H A D | Disassembler.h | 168 virtual bool IsLoad() = 0; 363 bool IsLoad() override;
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/freebsd/contrib/llvm-project/llvm/lib/Transforms/Scalar/ |
H A D | EarlyCSE.cpp | 684 bool IsLoad = false; member 688 bool IsAtomic, bool IsLoad) in LoadValue() 690 IsAtomic(IsAtomic), IsLoad(IsLoad) {} in LoadValue() 1588 if (InVal.IsLoad) in processNode()
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/freebsd/contrib/llvm-project/llvm/lib/Transforms/IPO/ |
H A D | Attributor.cpp | 364 template <bool IsLoad, typename Ty> 402 !(IsLoad ? isAllocationFn(&Obj, TLI) : isNoAliasCall(&Obj))) { in getPotentialCopiesOfMemoryValue() 443 if ((IsLoad && !Acc.isWriteOrAssumption()) || (!IsLoad && !Acc.isRead())) in getPotentialCopiesOfMemoryValue() 445 if (IsLoad) { in getPotentialCopiesOfMemoryValue() 467 if ((IsLoad && !Acc.isWriteOrAssumption()) || (!IsLoad && !Acc.isRead())) in getPotentialCopiesOfMemoryValue() 469 if (IsLoad && Acc.isWrittenValueYetUndetermined()) in getPotentialCopiesOfMemoryValue() 484 if (IsLoad) { in getPotentialCopiesOfMemoryValue() 531 /* FindInterferingWrites */ IsLoad, in getPotentialCopiesOfMemoryValue() 532 /* FindInterferingReads */ !IsLoad, CheckAccess, in getPotentialCopiesOfMemoryValue() 541 if (IsLoad && !HasBeenWrittenTo && !Range.isUnassigned()) { in getPotentialCopiesOfMemoryValue()
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/freebsd/contrib/llvm-project/llvm/lib/Target/VE/ |
H A D | VVPISelLowering.cpp | 126 const bool IsLoad = (VVPOpc == VEISD::VVP_LOAD); in lowerVVP_LOAD_STORE() local 151 if (IsLoad) { in lowerVVP_LOAD_STORE()
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/freebsd/contrib/llvm-project/clang/lib/CodeGen/ |
H A D | CGAtomic.cpp | 1232 bool IsLoad = E->getOp() == AtomicExpr::AO__c11_atomic_load || in EmitAtomicExpr() local 1258 if (IsLoad) in EmitAtomicExpr() 1264 if (IsLoad || IsStore) in EmitAtomicExpr() 1290 if (!IsLoad) in EmitAtomicExpr() 1292 if (!IsLoad && !IsStore) in EmitAtomicExpr() 1319 if (!IsLoad) { in EmitAtomicExpr() 1327 if (!IsLoad && !IsStore) { in EmitAtomicExpr()
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/freebsd/contrib/llvm-project/llvm/lib/Target/ARM/ |
H A D | ARMLoadStoreOptimizer.cpp | 500 bool IsLoad = in UpdateBaseRegUses() local 505 if (IsLoad || IsStore) { in UpdateBaseRegUses() 841 bool IsLoad = isi32Load(Opcode); in CreateLoadStoreDouble() local 842 assert((IsLoad || isi32Store(Opcode)) && "Must have integer load or store"); in CreateLoadStoreDouble() 843 unsigned LoadStoreOpcode = IsLoad ? ARM::t2LDRDi8 : ARM::t2STRDi8; in CreateLoadStoreDouble() 848 if (IsLoad) { in CreateLoadStoreDouble() 864 bool IsLoad = isLoadSingle(Opcode); in MergeOpsUpdate() local 879 if (IsLoad) { in MergeOpsUpdate()
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/freebsd/contrib/llvm-project/llvm/lib/Target/SPIRV/ |
H A D | SPIRVBuiltins.cpp | 2382 bool IsLoad = Opcode == SPIRV::OpLoad; in generateLoadStoreInst() local 2385 if (IsLoad) { in generateLoadStoreInst() 2394 if (!IsLoad) { in generateLoadStoreInst() 2400 if ((IsLoad && NumArgs >= 2) || NumArgs >= 3) { in generateLoadStoreInst() 2401 MIB.addImm(getConstFromIntrinsic(Call->Arguments[IsLoad ? 1 : 2], MRI)); in generateLoadStoreInst() 2402 MRI->setRegClass(Call->Arguments[IsLoad ? 1 : 2], &SPIRV::IDRegClass); in generateLoadStoreInst() 2404 if ((IsLoad && NumArgs >= 3) || NumArgs >= 4) { in generateLoadStoreInst() 2405 MIB.addImm(getConstFromIntrinsic(Call->Arguments[IsLoad ? 2 : 3], MRI)); in generateLoadStoreInst() 2406 MRI->setRegClass(Call->Arguments[IsLoad ? 2 : 3], &SPIRV::IDRegClass); in generateLoadStoreInst()
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/freebsd/contrib/llvm-project/llvm/lib/CodeGen/ |
H A D | InlineSpiller.cpp | 821 bool IsLoad = InstrReg; in coalesceStackAccess() local 822 if (!IsLoad) in coalesceStackAccess() 829 if (!IsLoad) in coalesceStackAccess() 836 if (IsLoad) { in coalesceStackAccess()
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