| /freebsd/contrib/llvm-project/llvm/lib/Target/Xtensa/ |
| H A D | XtensaTargetMachine.cpp | 33 bool IsLittle) { in computeDataLayout() argument
51 bool IsLittle) in XtensaTargetMachine() argument
52 : LLVMTargetMachine(T, computeDataLayout(TT, CPU, Options, IsLittle), TT, in XtensaTargetMachine()
|
| /freebsd/contrib/llvm-project/llvm/include/llvm/ObjCopy/ |
| H A D | CommonConfig.h | 34 MachineInfo(uint16_t EM, uint8_t ABI, bool Is64, bool IsLittle) in MachineInfo()
35 : EMachine(EM), OSABI(ABI), Is64Bit(Is64), IsLittleEndian(IsLittle) {} in MachineInfo()
37 MachineInfo(uint16_t EM, bool Is64, bool IsLittle) in MachineInfo()
38 : MachineInfo(EM, ELF::ELFOSABI_NONE, Is64, IsLittle) {} in MachineInfo()
|
| /freebsd/contrib/llvm-project/llvm/lib/Target/ARM/ |
| H A D | ARMSubtarget.cpp | 91 const ARMBaseTargetMachine &TM, bool IsLittle, in ARMSubtarget() argument
95 IsLittle(IsLittle), TargetTriple(TT), Options(TM.Options), TM(TM), in ARMSubtarget()
|
| H A D | ARMSubtarget.h | 148 bool IsLittle; variable
169 const ARMBaseTargetMachine &TM, bool IsLittle,
409 bool isLittle() const { return IsLittle; } in isLittle()
|
| H A D | ARMCallLowering.cpp | 167 bool IsLittle = MIRBuilder.getMF().getSubtarget<ARMSubtarget>().isLittle(); in assignCustomValue() local
168 if (!IsLittle) in assignCustomValue()
345 bool IsLittle = MIRBuilder.getMF().getSubtarget<ARMSubtarget>().isLittle(); in assignCustomValue() local
346 if (!IsLittle) in assignCustomValue()
|
| /freebsd/contrib/llvm-project/llvm/lib/Target/Mips/ |
| H A D | MipsSubtarget.h | 75 bool IsLittle; variable
286 bool isLittle() const { return IsLittle; } in isLittle()
|
| H A D | MipsISelLowering.cpp | 2716 bool IsLittle = Subtarget.isLittle(); in lowerLOAD() local
2730 IsLittle ? 7 : 0); in lowerLOAD()
2732 IsLittle ? 0 : 7); in lowerLOAD()
2736 IsLittle ? 3 : 0); in lowerLOAD()
2738 IsLittle ? 0 : 3); in lowerLOAD()
2786 bool IsLittle) { in lowerUnalignedIntStore() argument
2798 IsLittle ? 3 : 0); in lowerUnalignedIntStore()
2799 return createStoreLR(MipsISD::SWR, DAG, SD, SWL, IsLittle ? 0 : 3); in lowerUnalignedIntStore()
2809 SDValue SDL = createStoreLR(MipsISD::SDL, DAG, SD, Chain, IsLittle ? 7 : 0); in lowerUnalignedIntStore()
2810 return createStoreLR(MipsISD::SDR, DAG, SD, SDL, IsLittle ? 0 : 7); in lowerUnalignedIntStore()
[all …]
|
| H A D | MipsSubtarget.cpp | 75 MipsArchVersion(MipsDefault), IsLittle(little), IsSoftFloat(false), in MipsSubtarget()
|
| /freebsd/contrib/llvm-project/llvm/lib/Target/Mips/MCTargetDesc/ |
| H A D | MipsMCCodeEmitter.h | 39 MipsMCCodeEmitter(const MCInstrInfo &mcii, MCContext &Ctx_, bool IsLittle) in MipsMCCodeEmitter() argument
40 : MCII(mcii), Ctx(Ctx_), IsLittleEndian(IsLittle) {} in MipsMCCodeEmitter()
|
| /freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/ |
| H A D | AArch64Subtarget.h | 80 bool IsLittle; variable
256 bool isLittleEndian() const { return IsLittle; } in isLittleEndian()
|
| H A D | AArch64Subtarget.cpp | 331 IsLittle(LittleEndian), IsStreaming(IsStreaming), in AArch64Subtarget()
|
| /freebsd/contrib/llvm-project/llvm/lib/Target/ARM/MCTargetDesc/ |
| H A D | ARMMCCodeEmitter.cpp | 57 ARMMCCodeEmitter(const MCInstrInfo &mcii, MCContext &ctx, bool IsLittle) in ARMMCCodeEmitter()
58 : MCII(mcii), CTX(ctx), IsLittleEndian(IsLittle) { in ARMMCCodeEmitter()
56 ARMMCCodeEmitter(const MCInstrInfo & mcii,MCContext & ctx,bool IsLittle) ARMMCCodeEmitter() argument
|