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Searched refs:IsLP64 (Results 1 – 5 of 5) sorted by relevance

/freebsd/contrib/llvm-project/llvm/lib/Target/X86/
H A DX86FrameLowering.cpp57 IsLP64 = STI.isTarget64BitLP64(); in X86FrameLowering()
109 static unsigned getSUBriOpcode(bool IsLP64) { in getSUBriOpcode() argument
110 return IsLP64 ? X86::SUB64ri32 : X86::SUB32ri; in getSUBriOpcode()
113 static unsigned getADDriOpcode(bool IsLP64) { in getADDriOpcode() argument
114 return IsLP64 ? X86::ADD64ri32 : X86::ADD32ri; in getADDriOpcode()
117 static unsigned getSUBrrOpcode(bool IsLP64) { in getSUBrrOpcode() argument
118 return IsLP64 ? X86::SUB64rr : X86::SUB32rr; in getSUBrrOpcode()
121 static unsigned getADDrrOpcode(bool IsLP64) { in getADDrrOpcode() argument
122 return IsLP64 ? X86::ADD64rr : X86::ADD32rr; in getADDrrOpcode()
125 static unsigned getANDriOpcode(bool IsLP64, int64_t Imm) { in getANDriOpcode() argument
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H A DX86FrameLowering.h43 bool IsLP64; variable
H A DX86InstrCompiler.td60 "#ADJCALLSTACKDOWN", []>, Requires<[IsLP64]>;
64 Requires<[IsLP64]>;
67 (ADJCALLSTACKDOWN64 i32imm:$amt1, i32imm:$amt2, 0)>, Requires<[IsLP64]>;
91 (implicit EFLAGS)]>, Requires<[In64BitMode, IsLP64]>;
394 Requires<[IsLP64]>;
398 Requires<[IsLP64]>;
402 Requires<[IsLP64]>;
406 Requires<[IsLP64]>;
438 Requires<[IsLP64]>;
443 Requires<[IsLP64]>;
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H A DX86InstrPredicates.td191 def IsLP64 : Predicate<"Subtarget->isTarget64BitLP64()">;
H A DX86ISelLowering.cpp35231 static unsigned getSUBriOpcode(bool IsLP64) { in getSUBriOpcode() argument
35232 if (IsLP64) in getSUBriOpcode()
35343 const bool IsLP64 = Subtarget.isTarget64BitLP64(); in EmitLoweredSegAlloca() local
35346 const unsigned TlsOffset = IsLP64 ? 0x70 : Is64Bit ? 0x40 : 0x30; in EmitLoweredSegAlloca()
35378 IsLP64 || Subtarget.isTargetNaCl64() ? X86::RSP : X86::ESP; in EmitLoweredSegAlloca()
35393 BuildMI(BB, MIMD, TII->get(IsLP64 ? X86::SUB64rr:X86::SUB32rr), SPLimitVReg) in EmitLoweredSegAlloca()
35395 BuildMI(BB, MIMD, TII->get(IsLP64 ? X86::CMP64mr:X86::CMP32mr)) in EmitLoweredSegAlloca()
35411 if (IsLP64) { in EmitLoweredSegAlloca()
35442 .addReg(IsLP64 ? X86::RAX : X86::EAX); in EmitLoweredSegAlloca()