Searched refs:IsHi (Results 1 – 4 of 4) sorted by relevance
| /freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/Disassembler/ |
| H A D | AMDGPUDisassembler.cpp | 314 bool IsHi = Imm & (1 << 9); in DECODE_OPERAND_REG_8() local
317 return addOperand(Inst, DAsm->createVGPR16Operand(RegIdx, IsHi)); in DECODE_OPERAND_REG_8()
325 bool IsHi = Imm & (1 << 7); in DecodeVGPR_16_Lo128RegisterClass() local
328 return addOperand(Inst, DAsm->createVGPR16Operand(RegIdx, IsHi)); in DecodeVGPR_16_Lo128RegisterClass()
339 bool IsHi = Imm & (1 << 7); in decodeOperand_VSrcT16_Lo128() local
341 return addOperand(Inst, DAsm->createVGPR16Operand(RegIdx, IsHi)); in decodeOperand_VSrcT16_Lo128()
355 bool IsHi = Imm & (1 << 9); in decodeOperand_VSrcT16() local
357 return addOperand(Inst, DAsm->createVGPR16Operand(RegIdx, IsHi)); in decodeOperand_VSrcT16()
1240 bool IsHi) const { in createVGPR16Operand()
1241 unsigned RegIdxInVGPR16 = RegIdx * 2 + (IsHi ? 1 : 0); in createVGPR16Operand()
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| H A D | AMDGPUDisassembler.h | 127 MCOperand createVGPR16Operand(unsigned RegIdx, bool IsHi) const;
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| /freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/MCTargetDesc/ |
| H A D | AMDGPUMCCodeEmitter.cpp | 653 bool IsHi = Encoding & AMDGPU::HWEncoding::IS_HI; in getMachineOpValueT16Lo128() local
656 Op = (IsVGPR ? 0x100 : 0) | (IsHi ? 0x80 : 0) | RegIdx; in getMachineOpValueT16Lo128()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/RISCV/ |
| H A D | RISCVISelLowering.cpp | 2548 bool IsHi = in decomposeSubvectorInsertExtractToSubRegs()
2551 getSubregIndexByMVT(VecVT, IsHi)); in decomposeSubvectorInsertExtractToSubRegs()
2552 if (IsHi) in decomposeSubvectorInsertExtractToSubRegs()
2547 bool IsHi = decomposeSubvectorInsertExtractToSubRegs() local
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