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Searched refs:IsFSHL (Results 1 – 6 of 6) sorted by relevance

/freebsd/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/
H A DTargetLowering.cpp2204 bool IsFSHL = (Op.getOpcode() == ISD::FSHL); in SimplifyDemandedBits() local
2212 if (SimplifyDemandedBits(IsFSHL ? Op0 : Op1, DemandedBits, DemandedElts, in SimplifyDemandedBits()
2220 APInt Demanded0 = DemandedBits.lshr(IsFSHL ? Amt : (BitWidth - Amt)); in SimplifyDemandedBits()
2221 APInt Demanded1 = DemandedBits << (IsFSHL ? (BitWidth - Amt) : Amt); in SimplifyDemandedBits()
2229 Known2.One <<= (IsFSHL ? Amt : (BitWidth - Amt)); in SimplifyDemandedBits()
2230 Known2.Zero <<= (IsFSHL ? Amt : (BitWidth - Amt)); in SimplifyDemandedBits()
2231 Known.One.lshrInPlace(IsFSHL ? (BitWidth - Amt) : Amt); in SimplifyDemandedBits()
2232 Known.Zero.lshrInPlace(IsFSHL ? (BitWidth - Amt) : Amt); in SimplifyDemandedBits()
8145 bool IsFSHL = Node->getOpcode() == ISD::VP_FSHL; in expandVPFunnelShift() local
8156 ShX = DAG.getNode(ISD::VP_SHL, DL, VT, X, IsFSHL ? ShAmt : InvShAmt, Mask, in expandVPFunnelShift()
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H A DDAGCombiner.cpp11246 bool IsFSHL = N->getOpcode() == ISD::FSHL; in visitFunnelShift() local
11255 return IsFSHL ? N0 : N1; in visitFunnelShift()
11274 return IsFSHL ? N0 : N1; in visitFunnelShift()
11283 DAG.getConstant(IsFSHL ? BitWidth - ShAmt : ShAmt, DL, ShAmtTy)); in visitFunnelShift()
11287 DAG.getConstant(IsFSHL ? ShAmt : BitWidth - ShAmt, DL, ShAmtTy)); in visitFunnelShift()
11305 IsFSHL ? (((BitWidth - ShAmt) % BitWidth) / 8) : (ShAmt / 8); in visitFunnelShift()
11334 if (IsUndefOrZero(N0) && !IsFSHL && DAG.MaskedValueIsZero(N2, ~ModuloBits)) in visitFunnelShift()
11336 if (IsUndefOrZero(N1) && IsFSHL && DAG.MaskedValueIsZero(N2, ~ModuloBits)) in visitFunnelShift()
11345 unsigned RotOpc = IsFSHL ? ISD::ROTL : ISD::ROTR; in visitFunnelShift()
H A DSelectionDAGBuilder.cpp7214 bool IsFSHL = Intrinsic == Intrinsic::fshl; in visitIntrinsicCall() local
7221 auto RotateOpcode = IsFSHL ? ISD::ROTL : ISD::ROTR; in visitIntrinsicCall()
7224 auto FunnelOpcode = IsFSHL ? ISD::FSHL : ISD::FSHR; in visitIntrinsicCall()
/freebsd/contrib/llvm-project/llvm/lib/CodeGen/GlobalISel/
H A DLegalizerHelper.cpp7284 const bool IsFSHL = MI.getOpcode() == TargetOpcode::G_FSHL; in lowerFunnelShiftWithInverse() local
7285 unsigned RevOpcode = IsFSHL ? TargetOpcode::G_FSHR : TargetOpcode::G_FSHL; in lowerFunnelShiftWithInverse()
7296 if (IsFSHL) { in lowerFunnelShiftWithInverse()
7319 const bool IsFSHL = MI.getOpcode() == TargetOpcode::G_FSHL; in lowerFunnelShiftAsShifts() local
7332 ShX = MIRBuilder.buildShl(Ty, X, IsFSHL ? ShAmt : InvShAmt).getReg(0); in lowerFunnelShiftAsShifts()
7333 ShY = MIRBuilder.buildLShr(Ty, Y, IsFSHL ? InvShAmt : ShAmt).getReg(0); in lowerFunnelShiftAsShifts()
7351 if (IsFSHL) { in lowerFunnelShiftAsShifts()
7377 bool IsFSHL = MI.getOpcode() == TargetOpcode::G_FSHL; in lowerFunnelShift() local
7378 unsigned RevOpcode = IsFSHL ? TargetOpcode::G_FSHR : TargetOpcode::G_FSHL; in lowerFunnelShift()
H A DCombinerHelper.cpp4461 bool IsFSHL = Opc == TargetOpcode::G_FSHL; in applyFunnelShiftToRotate() local
4463 MI.setDesc(Builder.getTII().get(IsFSHL ? TargetOpcode::G_ROTL in applyFunnelShiftToRotate()
/freebsd/contrib/llvm-project/llvm/lib/Target/PowerPC/
H A DPPCISelLowering.cpp9339 bool IsFSHL = Op.getOpcode() == ISD::FSHL; in LowerFunnelShift() local
9353 X = DAG.getNode(PPCISD::SHL, dl, VT, X, IsFSHL ? Z : SubZ); in LowerFunnelShift()
9354 Y = DAG.getNode(PPCISD::SRL, dl, VT, Y, IsFSHL ? SubZ : Z); in LowerFunnelShift()