Searched refs:IsFSHL (Results 1 – 6 of 6) sorted by relevance
/freebsd/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/ |
H A D | TargetLowering.cpp | 2136 bool IsFSHL = (Op.getOpcode() == ISD::FSHL); in SimplifyDemandedBits() local 2144 if (SimplifyDemandedBits(IsFSHL ? Op0 : Op1, DemandedBits, DemandedElts, in SimplifyDemandedBits() 2152 APInt Demanded0 = DemandedBits.lshr(IsFSHL ? Amt : (BitWidth - Amt)); in SimplifyDemandedBits() 2153 APInt Demanded1 = DemandedBits << (IsFSHL ? (BitWidth - Amt) : Amt); in SimplifyDemandedBits() 2161 Known2.One <<= (IsFSHL ? Amt : (BitWidth - Amt)); in SimplifyDemandedBits() 2162 Known2.Zero <<= (IsFSHL ? Amt : (BitWidth - Amt)); in SimplifyDemandedBits() 2163 Known.One.lshrInPlace(IsFSHL ? (BitWidth - Amt) : Amt); in SimplifyDemandedBits() 2164 Known.Zero.lshrInPlace(IsFSHL ? (BitWidth - Amt) : Amt); in SimplifyDemandedBits() 7927 bool IsFSHL = Node->getOpcode() == ISD::VP_FSHL; in expandVPFunnelShift() local 7938 ShX = DAG.getNode(ISD::VP_SHL, DL, VT, X, IsFSHL ? ShAmt : InvShAmt, Mask, in expandVPFunnelShift() [all …]
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H A D | DAGCombiner.cpp | 10778 bool IsFSHL = N->getOpcode() == ISD::FSHL; in visitFunnelShift() local 10787 return IsFSHL ? N0 : N1; in visitFunnelShift() 10806 return IsFSHL ? N0 : N1; in visitFunnelShift() 10815 DAG.getConstant(IsFSHL ? BitWidth - ShAmt : ShAmt, DL, ShAmtTy)); in visitFunnelShift() 10819 DAG.getConstant(IsFSHL ? ShAmt : BitWidth - ShAmt, DL, ShAmtTy)); in visitFunnelShift() 10837 IsFSHL ? (((BitWidth - ShAmt) % BitWidth) / 8) : (ShAmt / 8); in visitFunnelShift() 10867 if (IsUndefOrZero(N0) && !IsFSHL && DAG.MaskedValueIsZero(N2, ~ModuloBits)) in visitFunnelShift() 10869 if (IsUndefOrZero(N1) && IsFSHL && DAG.MaskedValueIsZero(N2, ~ModuloBits)) in visitFunnelShift() 10878 unsigned RotOpc = IsFSHL ? ISD::ROTL : ISD::ROTR; in visitFunnelShift()
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H A D | SelectionDAGBuilder.cpp | 7162 bool IsFSHL = Intrinsic == Intrinsic::fshl; in visitIntrinsicCall() local 7169 auto RotateOpcode = IsFSHL ? ISD::ROTL : ISD::ROTR; in visitIntrinsicCall() 7172 auto FunnelOpcode = IsFSHL ? ISD::FSHL : ISD::FSHR; in visitIntrinsicCall()
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/freebsd/contrib/llvm-project/llvm/lib/CodeGen/GlobalISel/ |
H A D | LegalizerHelper.cpp | 6594 const bool IsFSHL = MI.getOpcode() == TargetOpcode::G_FSHL; in lowerFunnelShiftWithInverse() local 6595 unsigned RevOpcode = IsFSHL ? TargetOpcode::G_FSHR : TargetOpcode::G_FSHL; in lowerFunnelShiftWithInverse() 6606 if (IsFSHL) { in lowerFunnelShiftWithInverse() 6629 const bool IsFSHL = MI.getOpcode() == TargetOpcode::G_FSHL; in lowerFunnelShiftAsShifts() local 6642 ShX = MIRBuilder.buildShl(Ty, X, IsFSHL ? ShAmt : InvShAmt).getReg(0); in lowerFunnelShiftAsShifts() 6643 ShY = MIRBuilder.buildLShr(Ty, Y, IsFSHL ? InvShAmt : ShAmt).getReg(0); in lowerFunnelShiftAsShifts() 6661 if (IsFSHL) { in lowerFunnelShiftAsShifts() 6687 bool IsFSHL = MI.getOpcode() == TargetOpcode::G_FSHL; in lowerFunnelShift() local 6688 unsigned RevOpcode = IsFSHL ? TargetOpcode::G_FSHR : TargetOpcode::G_FSHL; in lowerFunnelShift()
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H A D | CombinerHelper.cpp | 4305 bool IsFSHL = Opc == TargetOpcode::G_FSHL; in applyFunnelShiftToRotate() local 4307 MI.setDesc(Builder.getTII().get(IsFSHL ? TargetOpcode::G_ROTL in applyFunnelShiftToRotate()
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/freebsd/contrib/llvm-project/llvm/lib/Target/PowerPC/ |
H A D | PPCISelLowering.cpp | 9193 bool IsFSHL = Op.getOpcode() == ISD::FSHL; in LowerFunnelShift() local 9207 X = DAG.getNode(PPCISD::SHL, dl, VT, X, IsFSHL ? Z : SubZ); in LowerFunnelShift() 9208 Y = DAG.getNode(PPCISD::SRL, dl, VT, Y, IsFSHL ? SubZ : Z); in LowerFunnelShift()
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