| /freebsd/contrib/llvm-project/llvm/utils/TableGen/GlobalISel/ |
| H A D | GIMatchDagOperands.h | |
| H A D | GIMatchDagOperands.cpp | |
| /freebsd/contrib/llvm-project/llvm/include/llvm/CodeGen/ |
| H A D | MachineOperand.h | 94 unsigned IsDef : 1; variable
380 return !IsDef; in isUse()
385 return IsDef; in isDef()
395 return IsDeadOrKill & IsDef; in isDead()
400 return IsDeadOrKill & !IsDef; in isKill()
520 assert(isReg() && !IsDef && "Wrong MachineOperand mutator");
526 assert(isReg() && IsDef && "Wrong MachineOperand mutator");
543 assert(isReg() && IsDef && "Wrong MachineOperand mutator");
548 assert(isReg() && !IsDef && "Wrong MachineOperand mutator");
852 Op.IsDef = isDef;
|
| H A D | RDFGraph.h | 825 static bool IsDef(const Node BA) { in IsDef() function
|
| /freebsd/contrib/llvm-project/llvm/utils/TableGen/ |
| H A D | InstrDocsEmitter.cpp | 161 bool IsDef = i < II->Operands.NumDefs; in EmitInstrDocs() local
175 OS << "* " << (IsDef ? "DEF" : "USE") << " ``" << Op.Rec->getName() in EmitInstrDocs()
186 OS << "* " << (IsDef ? "DEF" : "USE") << " ``" << Op.Rec->getName() in EmitInstrDocs()
|
| H A D | GlobalISelCombinerMatchTableEmitter.cpp | |
| /freebsd/contrib/llvm-project/llvm/lib/Target/Hexagon/ |
| H A D | RDFDeadCode.cpp | 137 if (DFG.IsDef(RA)) in collect()
152 for (NodeAddr<DefNode*> DA : IA.Addr->members_if(DFG.IsDef, DFG)) in collect()
226 else if (DFG.IsDef(RA)) in erase()
|
| H A D | HexagonConstExtenders.cpp | 316 bool IsDef = false; member
491 if (ED.IsDef) in operator <<()
1152 ED.IsDef = true; in recordExtender()
1172 ED.IsDef = true; in recordExtender()
1177 ED.IsDef = true; in recordExtender()
1181 ED.IsDef = true; in recordExtender()
1267 if (!ED.IsDef) in assignInits()
1287 if (ED.IsDef) in assignInits()
1836 assert((!ED.IsDef || ED.Rd.Reg != 0) && "Missing Rd for def"); in replaceInstr()
1861 if (ED.IsDef && Diff != 0) { in replaceInstr()
[all …]
|
| H A D | HexagonOptAddrMode.cpp | 192 if ((DFG->IsDef(AA) && AA.Id != OffsetRegRD) || in canRemoveAddasl()
264 for (NodeAddr<DefNode *> DA : SA.Addr->members_if(DFG->IsDef, *DFG)) { in getAllRealUses()
325 if ((DFG->IsDef(AA) && AA.Id != LRExtRegRD) || in isSafeToExtLR()
607 FirstReachedUseSN.Addr->members_if(DFG->IsDef, *DFG).front(); in processAddBases()
655 if ((DFG->IsDef(NearestAA) && NearestAA.Id != FirstReachedUseDN.Id) || in processAddBases()
656 (!DFG->IsDef(NearestAA) && in processAddBases()
|
| H A D | HexagonRDFOpt.cpp | 166 if (DFG.IsDef(RA) && DeadNodes.count(RA.Id)) in run()
256 for (NodeAddr<DefNode*> DA : IA.Addr->members_if(DFG.IsDef, DFG)) { in rewrite()
|
| H A D | HexagonFrameLowering.h | 179 bool IsDef, bool IsKill) const;
|
| H A D | RDFCopy.cpp | 183 for (NodeAddr<DefNode*> DA : SA.Addr->members_if(DFG.IsDef, DFG)) { in run()
|
| H A D | HexagonFrameLowering.cpp | 2553 const CSIVect &CSI, bool IsDef, bool IsKill) const { in addCalleeSaveRegistersAsImpOperand() argument
2556 MI->addOperand(MachineOperand::CreateReg(R.getReg(), IsDef, true, IsKill)); in addCalleeSaveRegistersAsImpOperand()
|
| /freebsd/contrib/llvm-project/llvm/lib/Target/Mips/ |
| H A D | MipsSEISelDAGToDAG.h | 30 void addDSPCtrlRegOperands(bool IsDef, MachineInstr &MI,
|
| H A D | MipsDelaySlotFiller.cpp | 128 bool IsDef) const;
428 unsigned Reg, bool IsDef) const { in checkRegDefsUses()
429 if (IsDef) { in checkRegDefsUses()
|
| H A D | MipsSEISelDAGToDAG.cpp | 47 void MipsSEDAGToDAGISel::addDSPCtrlRegOperands(bool IsDef, MachineInstr &MI, in addDSPCtrlRegOperands() argument
52 IsDef ? RegState::ImplicitDefine : RegState::Implicit | RegState::Undef; in addDSPCtrlRegOperands()
|
| /freebsd/contrib/llvm-project/llvm/utils/TableGen/Common/GlobalISel/ |
| H A D | GlobalISelMatchTable.h | 2110 bool IsDef; variable
2116 const Record *RegisterDef, bool IsDef = false,
2119 IsDef(IsDef), IsDead(IsDead), Target(Target) {} in OperandRenderer()
2136 bool IsDef; variable
2140 TempRegRenderer(unsigned InsnID, unsigned TempRegID, bool IsDef = false,
2144 SubRegIdx(SubReg), IsDef(IsDef), IsDead(IsDead) {} in OperandRenderer()
|
| H A D | GlobalISelMatchTable.cpp | 2015 if (IsDef) { in emitRenderOpcodes()
2029 const bool NeedsFlags = (SubRegIdx || IsDef); in emitRenderOpcodes()
2031 assert(!IsDef); in emitRenderOpcodes()
2048 if (IsDef) { in emitRenderOpcodes()
|
| /freebsd/contrib/llvm-project/llvm/lib/Target/X86/ |
| H A D | X86LoadValueInjectionLoadHardening.cpp | 418 Owner.Addr->members_if(DataFlowGraph::IsDef, DFG)) { in getGadgetGraph()
470 NodeList Defs = ArgPhi.Addr->members_if(DataFlowGraph::IsDef, DFG); in getGadgetGraph()
482 NodeList Defs = SA.Addr->members_if(DataFlowGraph::IsDef, DFG); in getGadgetGraph()
|
| /freebsd/contrib/llvm-project/llvm/lib/CodeGen/ |
| H A D | MachineOperand.cpp | 109 if (IsDef == Val) in setIsDef()
116 IsDef = Val; in setIsDef()
120 IsDef = Val; in setIsDef()
308 IsDef = isDef; in ChangeToRegister()
|
| H A D | RDFGraph.cpp | 1052 for (Def DA : IA.Addr->members_if(IsDef, *this)) { in pushClobbers()
1100 for (Def DA : IA.Addr->members_if(IsDef, *this)) { in pushDefs()
1404 for (Ref RA : IA.Addr->members_if(IsDef, *this)) { in recordDefsForDF()
1455 for (Def DA : IA.Addr->members_if(IsDef, *this)) { in buildPhis()
1632 return IsDef(RA) && (RA.Addr->getFlags() & NodeAttrs::Clobbering); in linkBlockRefs()
1635 return IsDef(RA) && !(RA.Addr->getFlags() & NodeAttrs::Clobbering); in linkBlockRefs()
|
| H A D | BranchFolding.cpp | 1889 bool IsDef = false; in findHoistingInsertPosAndDeps() local
1900 IsDef = true; in findHoistingInsertPosAndDeps()
1904 if (!IsDef) in findHoistingInsertPosAndDeps()
|
| H A D | RDFLiveness.cpp | 381 if (DFG.IsDef(R)) { in getNearestAliasedRef()
|
| /freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/ |
| H A D | AArch64LoadStoreOptimizer.cpp | 1032 bool IsDef) { in mergePairedInsns() argument
1033 if (IsDef) { in mergePairedInsns()
1763 bool IsDef) { in canRenameUpToDef() argument
1776 FoundDef = IsDef; in canRenameUpToDef()
|
| /freebsd/contrib/llvm-project/llvm/lib/CodeGen/MIRParser/ |
| H A D | MIParser.cpp | 461 bool IsDef = false);
1747 bool IsDef) { in parseRegisterOperand() argument
1748 unsigned Flags = IsDef ? RegState::Define : 0; in parseRegisterOperand()
|