| /freebsd/contrib/llvm-project/llvm/utils/TableGen/GlobalISel/ |
| H A D | GIMatchDagOperands.h | |
| H A D | GIMatchDagOperands.cpp | |
| /freebsd/contrib/llvm-project/llvm/include/llvm/CodeGen/ |
| H A D | MachineOperand.h | 91 /// IsDef - True if this is a def, false if this is a use of the register.
94 unsigned IsDef : 1; variable
381 return !IsDef; in isUse()
386 return IsDef; in isDef()
396 return IsDeadOrKill & IsDef; in isDead()
401 return IsDeadOrKill & !IsDef; in isKill()
520 assert(isReg() && !IsDef && "Wrong MachineOperand mutator");
526 assert(isReg() && IsDef && "Wrong MachineOperand mutator");
543 assert(isReg() && IsDef && "Wrong MachineOperand mutator");
548 assert(isReg() && !IsDef
[all...] |
| H A D | RDFGraph.h | 825 static bool IsDef(const Node BA) { in IsDef() function
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| /freebsd/contrib/llvm-project/llvm/utils/TableGen/ |
| H A D | InstrDocsEmitter.cpp | 161 bool IsDef = i < II->Operands.NumDefs; in EmitInstrDocs() local
175 OS << "* " << (IsDef ? "DEF" : "USE") << " ``" << Op.Rec->getName() in EmitInstrDocs()
186 OS << "* " << (IsDef ? "DEF" : "USE") << " ``" << Op.Rec->getName() in EmitInstrDocs()
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| H A D | GlobalISelCombinerMatchTableEmitter.cpp | |
| /freebsd/contrib/llvm-project/llvm/lib/Target/Hexagon/ |
| H A D | RDFDeadCode.cpp | 137 if (DFG.IsDef(RA)) in collect()
152 for (NodeAddr<DefNode*> DA : IA.Addr->members_if(DFG.IsDef, DFG)) in collect()
226 else if (DFG.IsDef(RA)) in erase()
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| H A D | HexagonConstExtenders.cpp | 329 bool IsDef = false; member
504 if (ED.IsDef) in operator <<()
1165 ED.IsDef = true; in recordExtender()
1185 ED.IsDef = true; in recordExtender()
1190 ED.IsDef = true; in recordExtender()
1194 ED.IsDef = true; in recordExtender()
1280 if (!ED.IsDef) in assignInits()
1300 if (ED.IsDef) in assignInits()
1855 assert((!ED.IsDef || ED.Rd.Reg != 0) && "Missing Rd for def"); in replaceInstr()
1880 if (ED.IsDef && Diff != 0) { in replaceInstr()
[all …]
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| H A D | HexagonRDFOpt.cpp | 173 if (DFG.IsDef(RA) && DeadNodes.count(RA.Id)) in run()
263 for (NodeAddr<DefNode*> DA : IA.Addr->members_if(DFG.IsDef, DFG)) { in rewrite()
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| H A D | HexagonFrameLowering.h | 177 bool IsDef, bool IsKill) const;
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| H A D | HexagonOptAddrMode.cpp | 187 if ((DFG->IsDef(AA) && AA.Id != OffsetRegRD) || in canRemoveAddasl()
250 for (NodeAddr<DefNode *> DA : SA.Addr->members_if(DFG->IsDef, *DFG)) { in getAllRealUses()
311 if ((DFG->IsDef(AA) && AA.Id != LRExtRegRD) || in isSafeToExtLR()
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| H A D | RDFCopy.cpp | 184 for (NodeAddr<DefNode*> DA : SA.Addr->members_if(DFG.IsDef, DFG)) { in run()
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| /freebsd/contrib/llvm-project/llvm/utils/TableGen/Common/GlobalISel/ |
| H A D | GlobalISelMatchTable.h | 2051 bool IsDef; variable
2056 const Record *RegisterDef, bool IsDef = false)
2058 IsDef(IsDef), Target(Target) {} in OperandRenderer()
2075 bool IsDef; variable
2079 TempRegRenderer(unsigned InsnID, unsigned TempRegID, bool IsDef = false,
2083 SubRegIdx(SubReg), IsDef(IsDef), IsDead(IsDead) {} in OperandRenderer()
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| H A D | GlobalISelMatchTable.cpp | 1987 if (IsDef) in emitRenderOpcodes()
1998 const bool NeedsFlags = (SubRegIdx || IsDef); in emitRenderOpcodes()
2000 assert(!IsDef); in emitRenderOpcodes()
2016 if (IsDef) { in emitRenderOpcodes()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/Mips/ |
| H A D | MipsDelaySlotFiller.cpp | 130 bool IsDef) const;
433 unsigned Reg, bool IsDef) const { in checkRegDefsUses()
434 if (IsDef) { in checkRegDefsUses()
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| H A D | MipsSEISelDAGToDAG.h | 30 void addDSPCtrlRegOperands(bool IsDef, MachineInstr &MI,
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| H A D | MipsSEISelDAGToDAG.cpp | 52 void MipsSEDAGToDAGISel::addDSPCtrlRegOperands(bool IsDef, MachineInstr &MI, in addDSPCtrlRegOperands() argument
57 IsDef ? RegState::ImplicitDefine : RegState::Implicit | RegState::Undef; in addDSPCtrlRegOperands()
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| /freebsd/contrib/llvm-project/llvm/lib/CodeGen/ |
| H A D | MachineOperand.cpp | 110 if (IsDef == Val) in setIsDef()
117 IsDef = Val; in setIsDef()
121 IsDef = Val; in setIsDef()
296 IsDef = isDef; in ChangeToRegister()
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| H A D | RDFGraph.cpp | 1050 for (Def DA : IA.Addr->members_if(IsDef, *this)) { in pushClobbers()
1098 for (Def DA : IA.Addr->members_if(IsDef, *this)) { in pushDefs()
1399 for (Ref RA : IA.Addr->members_if(IsDef, *this)) { in recordDefsForDF()
1587 return IsDef(RA) && (RA.Addr->getFlags() & NodeAttrs::Clobbering); in linkBlockRefs()
1590 return IsDef(RA) && !(RA.Addr->getFlags() & NodeAttrs::Clobbering); in linkBlockRefs()
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| H A D | BranchFolding.cpp | 1867 bool IsDef = false; in findHoistingInsertPosAndDeps() local
1878 IsDef = true; in findHoistingInsertPosAndDeps()
1882 if (!IsDef) in findHoistingInsertPosAndDeps()
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| H A D | RDFLiveness.cpp | 381 if (DFG.IsDef(R)) { in getNearestAliasedRef()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/X86/ |
| H A D | X86LoadValueInjectionLoadHardening.cpp | 420 Owner.Addr->members_if(DataFlowGraph::IsDef, DFG)) { in getGadgetGraph()
472 NodeList Defs = ArgPhi.Addr->members_if(DataFlowGraph::IsDef, DFG); in getGadgetGraph()
484 NodeList Defs = SA.Addr->members_if(DataFlowGraph::IsDef, DFG); in getGadgetGraph()
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| H A D | X86FrameLowering.cpp | 3694 bool IsDef = false; in adjustStackWithPops() local
3698 IsDef = true; in adjustStackWithPops()
3703 if (IsDef) in adjustStackWithPops()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/ |
| H A D | AArch64LoadStoreOptimizer.cpp | 897 bool IsDef) { in mergePairedInsns() argument
898 if (IsDef) { in mergePairedInsns()
1484 bool IsDef) { in canRenameUpToDef() argument
1497 FoundDef = IsDef; in canRenameUpToDef()
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| /freebsd/contrib/llvm-project/llvm/lib/CodeGen/MIRParser/ |
| H A D | MIParser.cpp | 453 bool IsDef = false);
1739 bool IsDef) { in parseRegisterOperand() argument
1740 unsigned Flags = IsDef ? RegState::Define : 0; in parseRegisterOperand()
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