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Searched refs:IsAdd (Results 1 – 21 of 21) sorted by relevance

/freebsd/contrib/llvm-project/llvm/lib/Support/
H A DDivisionByConstantInfo.cpp81 Retval.IsAdd = false; // initialize "add" indicator in get()
111 Retval.IsAdd = true; in get()
121 Retval.IsAdd = true; in get()
135 if (Retval.IsAdd && !D[0] && AllowEvenDivisorOptimization) { in get()
140 assert(Retval.IsAdd == 0 && Retval.PreShift == 0); in get()
149 if (Retval.IsAdd) { in get()
/freebsd/contrib/llvm-project/llvm/lib/Target/ARC/
H A DARCFrameLowering.cpp451 unsigned Reg, int NumBytes, bool IsAdd, in emitRegUpdate() argument
455 Opc = IsAdd ? ARC::ADD_rru6 : ARC::SUB_rru6; in emitRegUpdate()
457 Opc = IsAdd ? ARC::ADD_rrs12 : ARC::SUB_rrs12; in emitRegUpdate()
459 Opc = IsAdd ? ARC::ADD_rrlimm : ARC::SUB_rrlimm; in emitRegUpdate()
483 bool IsAdd = (Old.getOpcode() == ARC::ADJCALLSTACKUP); in eliminateCallFramePseudoInstr() local
484 emitRegUpdate(MBB, I, dl, ARC::SP, Amt, IsAdd, TII); in eliminateCallFramePseudoInstr()
/freebsd/contrib/llvm-project/llvm/include/llvm/Support/
H A DDivisionByConstantInfo.h33 bool IsAdd; ///< add indicator member
/freebsd/contrib/llvm-project/llvm/lib/Transforms/Scalar/
H A DLoopFlatten.cpp204 bool IsAdd = match(U, m_c_Add(m_Specific(InnerInductionPHI), in matchLinearIVUser() local
240 if (Widened && (IsAdd || IsGEP) && in matchLinearIVUser()
252 if ((IsAdd || IsAddTrunc || IsGEP) && MatchedItCount == InnerTripCount) { in matchLinearIVUser()
/freebsd/contrib/llvm-project/llvm/lib/CodeGen/
H A DComplexDeinterleavingPass.cpp657 auto IsAdd = [](unsigned Op) { in identifyPartialMul() local
664 if (IsAdd(Real->getOpcode()) && IsAdd(Imag->getOpcode())) in identifyPartialMul()
666 else if (IsSub(Real->getOpcode()) && IsAdd(Imag->getOpcode())) in identifyPartialMul()
670 else if (IsAdd(Real->getOpcode()) && IsSub(Imag->getOpcode())) in identifyPartialMul()
/freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/
H A DAMDGPUISelDAGToDAG.cpp852 bool IsAdd = Opcode == ISD::ADD || Opcode == ISD::ADDC || Opcode == ISD::ADDE; in SelectADD_SUB_I64() local
875 unsigned Opc = OpcMap[0][N->isDivergent()][IsAdd]; in SelectADD_SUB_I64()
876 unsigned CarryOpc = OpcMap[1][N->isDivergent()][IsAdd]; in SelectADD_SUB_I64()
936 bool IsAdd = N->getOpcode() == ISD::UADDO; in SelectUADDO_USUBO() local
942 if ((IsAdd && (UI->getOpcode() != ISD::UADDO_CARRY)) || in SelectUADDO_USUBO()
943 (!IsAdd && (UI->getOpcode() != ISD::USUBO_CARRY))) { in SelectUADDO_USUBO()
950 unsigned Opc = IsAdd ? AMDGPU::V_ADD_CO_U32_e64 : AMDGPU::V_SUB_CO_U32_e64; in SelectUADDO_USUBO()
H A DAMDGPUInstructionSelector.cpp421 const bool IsAdd = I.getOpcode() == AMDGPU::G_UADDO || in selectG_UADDO_USUBO_UADDE_USUBE() local
428 IsAdd ? AMDGPU::V_ADD_CO_U32_e64 : AMDGPU::V_SUB_CO_U32_e64; in selectG_UADDO_USUBO_UADDE_USUBE()
429 unsigned CarryOpc = IsAdd ? AMDGPU::V_ADDC_U32_e64 : AMDGPU::V_SUBB_U32_e64; in selectG_UADDO_USUBO_UADDE_USUBE()
444 unsigned NoCarryOpc = IsAdd ? AMDGPU::S_ADD_U32 : AMDGPU::S_SUB_U32; in selectG_UADDO_USUBO_UADDE_USUBE()
445 unsigned CarryOpc = IsAdd ? AMDGPU::S_ADDC_U32 : AMDGPU::S_SUBB_U32; in selectG_UADDO_USUBO_UADDE_USUBE()
H A DSIISelLowering.cpp5000 bool IsAdd = (MI.getOpcode() == AMDGPU::S_ADD_U64_PSEUDO); in EmitInstrWithCustomInserter() local
5002 unsigned Opc = IsAdd ? AMDGPU::S_ADD_U64 : AMDGPU::S_SUB_U64; in EmitInstrWithCustomInserter()
5023 unsigned LoOpc = IsAdd ? AMDGPU::S_ADD_U32 : AMDGPU::S_SUB_U32; in EmitInstrWithCustomInserter()
5024 unsigned HiOpc = IsAdd ? AMDGPU::S_ADDC_U32 : AMDGPU::S_SUBB_U32; in EmitInstrWithCustomInserter()
5047 bool IsAdd = (MI.getOpcode() == AMDGPU::V_ADD_U64_PSEUDO); in EmitInstrWithCustomInserter() local
5053 if (IsAdd && ST.hasLshlAddB64()) { in EmitInstrWithCustomInserter()
5094 unsigned LoOpc = IsAdd ? AMDGPU::V_ADD_CO_U32_e64 : AMDGPU::V_SUB_CO_U32_e64; in EmitInstrWithCustomInserter()
5101 unsigned HiOpc = IsAdd ? AMDGPU::V_ADDC_U32_e64 : AMDGPU::V_SUBB_U32_e64; in EmitInstrWithCustomInserter()
/freebsd/contrib/llvm-project/llvm/lib/CodeGen/GlobalISel/
H A DLegalizerHelper.cpp7940 const bool IsAdd = MI.getOpcode() == TargetOpcode::G_SADDO; in lowerSADDO_SSUBO() local
7947 if (IsAdd) in lowerSADDO_SSUBO()
7965 IsAdd ? CmpInst::ICMP_SLT : CmpInst::ICMP_SGT, BoolTy, RHS, Zero); in lowerSADDO_SSUBO()
7980 bool IsAdd; in lowerAddSubSatToMinMax() local
7987 IsAdd = true; in lowerAddSubSatToMinMax()
7992 IsAdd = true; in lowerAddSubSatToMinMax()
7997 IsAdd = false; in lowerAddSubSatToMinMax()
8002 IsAdd = false; in lowerAddSubSatToMinMax()
8024 if (IsAdd) { in lowerAddSubSatToMinMax()
8041 Register Not = IsAdd ? MIRBuilder.buildNot(Ty, LHS).getReg(0) : LHS; in lowerAddSubSatToMinMax()
[all …]
H A DCombinerHelper.cpp5264 assert((!magics.IsAdd || magics.PreShift == 0) && "Unexpected pre-shift"); in buildUDivUsingMul()
5267 SelNPQ = magics.IsAdd; in buildUDivUsingMul()
/freebsd/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/
H A DTargetLowering.cpp6514 assert((!magics.IsAdd || magics.PreShift == 0) && in BuildUDIV()
6519 magics.IsAdd ? APInt::getOneBitSet(EltBits, EltBits - 1) in BuildUDIV()
6522 UseNPQ |= magics.IsAdd; in BuildUDIV()
10876 bool IsAdd = Node->getOpcode() == ISD::UADDO; in expandUADDSUBO() local
10879 unsigned OpcCarry = IsAdd ? ISD::UADDO_CARRY : ISD::USUBO_CARRY; in expandUADDSUBO()
10889 Result = DAG.getNode(IsAdd ? ISD::ADD : ISD::SUB, dl, in expandUADDSUBO()
10896 if (IsAdd && isOneConstant(RHS)) { in expandUADDSUBO()
10905 } else if (IsAdd && isAllOnesConstant(RHS)) { in expandUADDSUBO()
10911 ISD::CondCode CC = IsAdd ? ISD::SETULT : ISD::SETUGT; in expandUADDSUBO()
10922 bool IsAdd = Node->getOpcode() == ISD::SADDO; in expandSADDSUBO() local
[all …]
H A DLegalizeDAG.cpp3936 bool IsAdd = Node->getOpcode() == ISD::UADDO_CARRY; in ExpandNode() local
3939 unsigned Op = IsAdd ? ISD::ADD : ISD::SUB; in ExpandNode()
3946 ISD::CondCode CC = IsAdd ? ISD::SETULT : ISD::SETUGT; in ExpandNode()
3961 IsAdd ? DAG.getSetCC(dl, SetCCType, Sum2, Zero, ISD::SETEQ) in ExpandNode()
H A DDAGCombiner.cpp2536 bool IsAdd = N->getOpcode() == ISD::ADD; in foldAddSubBoolOfMaskedVal() local
2537 SDValue C = IsAdd ? N->getOperand(1) : N->getOperand(0); in foldAddSubBoolOfMaskedVal()
2538 SDValue Z = IsAdd ? N->getOperand(0) : N->getOperand(1); in foldAddSubBoolOfMaskedVal()
2558 SDValue C1 = IsAdd ? DAG.getConstant(CN->getAPIntValue() + 1, DL, VT) in foldAddSubBoolOfMaskedVal()
2560 return DAG.getNode(IsAdd ? ISD::SUB : ISD::ADD, DL, VT, C1, LowBit); in foldAddSubBoolOfMaskedVal()
2593 bool IsAdd = N->getOpcode() == ISD::ADD; in foldAddSubOfSignBit() local
2594 SDValue ConstantOp = IsAdd ? N->getOperand(1) : N->getOperand(0); in foldAddSubOfSignBit()
2595 SDValue ShiftOp = IsAdd ? N->getOperand(0) : N->getOperand(1); in foldAddSubOfSignBit()
2616 IsAdd ? ISD::ADD : ISD::SUB, DL, VT, in foldAddSubOfSignBit()
2618 SDValue NewShift = DAG.getNode(IsAdd ? ISD::SRA : ISD::SRL, DL, VT, in foldAddSubOfSignBit()
[all …]
H A DLegalizeIntegerTypes.cpp4489 bool IsAdd = Node->getOpcode() == ISD::SADDO; in ExpandIntRes_SADDSUBO() local
4490 unsigned CarryOp = IsAdd ? ISD::SADDO_CARRY : ISD::SSUBO_CARRY; in ExpandIntRes_SADDSUBO()
4502 Lo = DAG.getNode(IsAdd ? ISD::UADDO : ISD::USUBO, dl, VTList, {LHSL, RHSL}); in ExpandIntRes_SADDSUBO()
4539 if (IsAdd) in ExpandIntRes_SADDSUBO()
/freebsd/contrib/llvm-project/llvm/lib/Target/RISCV/
H A DRISCVISelLowering.cpp5691 bool IsAdd = Op.getOpcode() == ISD::SADDSAT; in lowerSADDSAT_SSUBSAT()
5696 DAG.getNode(IsAdd ? ISD::ADD : ISD::SUB, DL, MVT::i64, LHS, RHS); in lowerSADDSAT_SSUBSAT()
5728 bool IsAdd = Op.getOpcode() == ISD::SADDO; in lowerSADDO_SSUBO()
5733 DAG.getNode(IsAdd ? ISD::ADD : ISD::SUB, DL, MVT::i64, LHS, RHS); in lowerSADDO_SSUBO()
12501 bool IsAdd = N->getOpcode() == ISD::UADDO; in ReplaceNodeResults()
12506 DAG.getNode(IsAdd ? ISD::ADD : ISD::SUB, DL, MVT::i64, LHS, RHS); in ReplaceNodeResults()
12511 if (IsAdd && isOneConstant(RHS)) { in ReplaceNodeResults()
12519 } else if (IsAdd && isAllOnesConstant(RHS)) { in ReplaceNodeResults()
12529 IsAdd ? ISD::SETULT : ISD::SETUGT); in ReplaceNodeResults()
15649 bool IsAdd in performSRACombine()
5690 bool IsAdd = Op.getOpcode() == ISD::SADDSAT; lowerSADDSAT_SSUBSAT() local
5727 bool IsAdd = Op.getOpcode() == ISD::SADDO; lowerSADDO_SSUBO() local
12499 bool IsAdd = N->getOpcode() == ISD::UADDO; ReplaceNodeResults() local
15646 bool IsAdd = N0.getOpcode() == ISD::ADD; performSRACombine() local
[all...]
/freebsd/contrib/llvm-project/llvm/lib/Transforms/InstCombine/
H A DInstCombineSelect.cpp2112 auto IsSignedSaturateLimit = [&](Value *Limit, bool IsAdd) { in foldOverflowingAddSubSelect() argument
2133 if (IsAdd) { in foldOverflowingAddSubSelect()
/freebsd/contrib/llvm-project/llvm/lib/Target/Mips/
H A DMipsISelLowering.cpp1054 bool IsAdd = ROOTNode->getOpcode() == ISD::ADD; in performMADD_MSUBCombine() local
1055 unsigned Opcode = IsAdd ? (IsUnsigned ? MipsISD::MAddu : MipsISD::MAdd) in performMADD_MSUBCombine()
/freebsd/contrib/llvm-project/clang/lib/Sema/
H A DSemaOpenMP.cpp8299 bool IsAdd = BO->getOpcode() == BO_Add; in checkAndSetIncRHS() local
8301 return setStep(BO->getRHS(), !IsAdd); in checkAndSetIncRHS()
8302 if (IsAdd && getInitLCDecl(BO->getRHS()) == LCDecl) in checkAndSetIncRHS()
8306 bool IsAdd = CE->getOperator() == OO_Plus; in checkAndSetIncRHS() local
8307 if ((IsAdd || CE->getOperator() == OO_Minus) && CE->getNumArgs() == 2) { in checkAndSetIncRHS()
8309 return setStep(CE->getArg(1), !IsAdd); in checkAndSetIncRHS()
8310 if (IsAdd && getInitLCDecl(CE->getArg(1)) == LCDecl) in checkAndSetIncRHS()
/freebsd/contrib/llvm-project/llvm/lib/Target/PowerPC/
H A DPPCISelLowering.cpp18231 bool IsAdd = ((N.getOpcode() == ISD::ADD) || (N.getOpcode() == ISD::OR)); in setAlignFlagsForFI() local
18232 FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(IsAdd ? N.getOperand(0) : N); in setAlignFlagsForFI()
18246 if (!IsAdd) { in setAlignFlagsForFI()
/freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/
H A DAArch64ISelLowering.cpp20102 static SDValue foldOverflowCheck(SDNode *Op, SelectionDAG &DAG, bool IsAdd) { in foldOverflowCheck() argument
20107 if (IsAdd) { in foldOverflowCheck()
20115 SDValue CsetOp = CmpOp->getOperand(IsAdd ? 0 : 1); in foldOverflowCheck()
20117 if (CC != (IsAdd ? AArch64CC::HS : AArch64CC::LO)) in foldOverflowCheck()
/freebsd/contrib/llvm-project/llvm/lib/Target/X86/
H A DX86ISelLowering.cpp31838 bool IsAdd = Opc == ISD::UADDO_CARRY || Opc == ISD::SADDO_CARRY; in LowerADDSUBO_CARRY() local
31839 SDValue Sum = DAG.getNode(IsAdd ? X86ISD::ADC : X86ISD::SBB, DL, VTs, in LowerADDSUBO_CARRY()
52101 bool IsAdd = (Opcode == ISD::FADD) || (Opcode == ISD::ADD); in combineToHorizontalAddSub() local
52118 auto HorizOpcode = IsAdd ? X86ISD::FHADD : X86ISD::FHSUB; in combineToHorizontalAddSub()
52119 if (isHorizontalBinOp(HorizOpcode, LHS, RHS, DAG, Subtarget, IsAdd, in combineToHorizontalAddSub()
52135 auto HorizOpcode = IsAdd ? X86ISD::HADD : X86ISD::HSUB; in combineToHorizontalAddSub()
52136 if (isHorizontalBinOp(HorizOpcode, LHS, RHS, DAG, Subtarget, IsAdd, in combineToHorizontalAddSub()