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Searched refs:IsA16 (Results 1 – 9 of 9) sorted by relevance

/freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/
H A DAMDGPULegalizerInfo.cpp6219 bool IsA16, bool IsG16) { in packImage16bitOpsToDwords() argument
6233 (I >= Intr->CoordStart && !IsA16)) { in packImage16bitOpsToDwords()
6234 if ((I < Intr->GradientStart) && IsA16 && in packImage16bitOpsToDwords()
6243 assert((!IsA16 || Intr->NumBiasArgs == 0 || I != Intr->BiasIndex) && in packImage16bitOpsToDwords()
6356 const bool IsA16 = AddrTy == S16; in legalizeImageIntrinsic() local
6419 if (BaseOpcode->Gradients && !ST.hasG16() && (IsA16 != IsG16)) { in legalizeImageIntrinsic()
6425 if (IsA16 && !ST.hasA16()) { in legalizeImageIntrinsic()
6433 if (IsA16 || IsG16) { in legalizeImageIntrinsic()
6438 packImage16bitOpsToDwords(B, MI, PackedRegs, ArgOffset, Intr, IsA16, IsG16); in legalizeImageIntrinsic()
6509 if (IsA16) in legalizeImageIntrinsic()
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H A DMIMGInstructions.td1522 class MIMG_IntersectRay_Helper<bit Is64, bit IsA16> {
1523 int num_addrs = !if(Is64, !if(IsA16, 9, 12), !if(IsA16, 8, 11));
1527 int GFX11PlusNSAAddrs = !if(IsA16, 4, 5);
1530 !if(IsA16,
1573 multiclass MIMG_IntersectRay<mimgopc op, string opcode, bit Is64, bit IsA16> {
1574 defvar info = MIMG_IntersectRay_Helper<Is64, IsA16>;
1577 let A16 = IsA16;
1585 a16 = IsA16,
H A DSIISelLowering.cpp7914 bool IsA16 = false; in lowerImage() local
8007 IsA16 = VAddrScalarVT == MVT::f16 || VAddrScalarVT == MVT::i16; in lowerImage()
8011 if (IsA16 && (Op.getOperand(ArgOffset + I).getValueType() == MVT::f16)) { in lowerImage()
8020 assert((!IsA16 || Intr->NumBiasArgs == 0 || I != Intr->BiasIndex) && in lowerImage()
8026 if (BaseOpcode->Gradients && !ST->hasG16() && (IsA16 != IsG16)) { in lowerImage()
8035 if (IsA16) { in lowerImage()
8069 if (IsA16) { in lowerImage()
8193 Ops.push_back(IsA16 && // r128, a16 for gfx9 in lowerImage()
8196 Ops.push_back(IsA16 ? True : False); in lowerImage()
9173 const bool IsA16 = RayDir.getValueType().getVectorElementType() == MVT::f16; in LowerINTRINSIC_W_CHAIN() local
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H A DAMDGPUInstructionSelector.cpp1836 const bool IsA16 = (Flags & 1) != 0; in selectImageIntrinsic() local
1840 if (IsA16 && !STI.hasG16() && !IsG16) in selectImageIntrinsic()
2015 MIB.addImm(IsA16 && // a16 or r128 in selectImageIntrinsic()
2018 MIB.addImm(IsA16 ? -1 : 0); in selectImageIntrinsic()
H A DSIInstrInfo.cpp5162 bool IsA16 = false; in verifyInstruction() local
5165 IsA16 = R128A16->getImm() != 0; in verifyInstruction()
5168 IsA16 = A16->getImm() != 0; in verifyInstruction()
5174 AMDGPU::getAddrSizeMIMGOp(BaseOpcode, Dim, IsA16, ST.hasG16()); in verifyInstruction()
/freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/Utils/
H A DAMDGPUBaseInfo.cpp295 const MIMGDimInfo *Dim, bool IsA16, in getAddrSizeMIMGOp() argument
300 if (IsA16) in getAddrSizeMIMGOp()
311 if ((IsA16 && !IsG16Supported) || BaseOpcode->G16) in getAddrSizeMIMGOp()
H A DAMDGPUBaseInfo.h489 const MIMGDimInfo *Dim, bool IsA16,
/freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/Disassembler/
H A DAMDGPUDisassembler.cpp991 const bool IsA16 = (A16Idx != -1 && MI.getOperand(A16Idx).getImm()); in convertMIMGInst() local
994 AMDGPU::getAddrSizeMIMGOp(BaseOpcode, Dim, IsA16, AMDGPU::hasG16(STI)); in convertMIMGInst()
/freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/AsmParser/
H A DAMDGPUAsmParser.cpp3929 bool IsA16 = (A16Idx != -1 && Inst.getOperand(A16Idx).getImm()); in validateMIMGAddrSize() local
3931 if (IsA16 == BaseOpcode->A16) in validateMIMGAddrSize()
3945 AMDGPU::getAddrSizeMIMGOp(BaseOpcode, DimInfo, IsA16, hasG16()); in validateMIMGAddrSize()