| /freebsd/contrib/llvm-project/llvm/lib/Transforms/Scalar/ |
| H A D | ADCE.cpp | 134 DenseMap<Instruction *, InstInfoType> InstInfo; member in __anonf15092a00111::AggressiveDeadCodeElimination
135 bool isLive(Instruction *I) { return InstInfo[I].Live; } in isLive()
239 InstInfo.reserve(NumInsts); in initialize()
242 InstInfo[&I].Block = &BBInfo.second; in initialize()
247 BBInfo.second.TerminatorLiveInfo = &InstInfo[BBInfo.second.Terminator]; in initialize()
384 auto &Info = InstInfo[I]; in markLive()
617 InstInfo[Info.Terminator].Live = true; in updateDeadRegions()
702 InstInfo[PredTerm].Live = true; in makeUnconditional()
709 InstInfo[NewTerm].Live = true; in makeUnconditional()
713 InstInfo.erase(PredTerm); in makeUnconditional()
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| /freebsd/contrib/llvm-project/llvm/utils/TableGen/Common/ |
| H A D | CodeGenDAGPatterns.cpp | 1891 CodeGenInstruction &InstInfo = CDP.getTargetInfo().getInstruction(Operator); in GetNumNodeResults() local
1893 unsigned NumDefsToAdd = InstInfo.Operands.NumDefs; in GetNumNodeResults()
1896 for (unsigned i = 0; i != InstInfo.Operands.NumDefs; ++i) { in GetNumNodeResults()
1897 Record *OperandNode = InstInfo.Operands[i].Rec; in GetNumNodeResults()
1905 if (InstInfo.HasOneImplicitDefWithKnownVT(CDP.getTargetInfo()) != in GetNumNodeResults()
2551 CodeGenInstruction &InstInfo = in ApplyTypeConstraints() local
2559 std::min(InstInfo.Operands.NumDefs, Inst.getNumResults()); in ApplyTypeConstraints()
2565 if (!InstInfo.ImplicitDefs.empty()) { in ApplyTypeConstraints()
2571 InstInfo.HasOneImplicitDefWithKnownVT(CDP.getTargetInfo()); in ApplyTypeConstraints()
2614 unsigned NumFixedOperands = InstInfo.Operands.size(); in ApplyTypeConstraints()
[all …]
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| /freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
| H A D | GCNCreateVOPD.cpp | 88 auto InstInfo = in doReplace() local
92 auto MCOprIdx = InstInfo[CompIdx].getIndexOfDstInMCOperands(); in doReplace()
97 auto CompSrcOprNum = InstInfo[CompIdx].getCompSrcOperandsNum(); in doReplace()
99 auto MCOprIdx = InstInfo[CompIdx].getIndexOfSrcInMCOperands(CompSrcIdx); in doReplace()
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| H A D | GCNVOPDUtils.cpp | 77 auto InstInfo = in checkVOPDRegConstraints() local
94 if (InstInfo[CompIdx].hasMandatoryLiteral()) { in checkVOPDRegConstraints()
95 auto CompOprIdx = InstInfo[CompIdx].getMandatoryLiteralCompOperandIndex(); in checkVOPDRegConstraints()
112 if (InstInfo.hasInvalidOperand(getVRegIdx, SkipSrc)) in checkVOPDRegConstraints()
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| /freebsd/contrib/llvm-project/llvm/tools/llvm-mca/Views/ |
| H A D | InstructionInfoView.cpp | 167 json::Array InstInfo; in toJSON() local
172 InstInfo.push_back(std::move(JO)); in toJSON()
174 return json::Object({{"InstructionList", json::Value(std::move(InstInfo))}}); in toJSON()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/Utils/ |
| H A D | AMDGPUBaseInfo.h | 803 class InstInfo {
810 InstInfo(const MCInstrDesc &OpX, const MCInstrDesc &OpY) in InstInfo() function
813 InstInfo(const ComponentInfo &OprInfoX, const ComponentInfo &OprInfoY) in InstInfo() function
854 VOPD::InstInfo getVOPDInstInfo(const MCInstrDesc &OpX, const MCInstrDesc &OpY);
858 VOPD::InstInfo
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| H A D | AMDGPUBaseInfo.cpp | 702 std::optional<unsigned> InstInfo::getInvalidCompOperandIndex( in getInvalidCompOperandIndex()
729 InstInfo::RegIndices InstInfo::getRegIndices( in getRegIndices()
735 InstInfo::RegIndices RegIndices; in getRegIndices()
751 VOPD::InstInfo getVOPDInstInfo(const MCInstrDesc &OpX, const MCInstrDesc &OpY) { in getVOPDInstInfo()
752 return VOPD::InstInfo(OpX, OpY); in getVOPDInstInfo()
755 VOPD::InstInfo getVOPDInstInfo(unsigned VOPDOpcode, in getVOPDInstInfo()
762 return VOPD::InstInfo(OpXInfo, OpYInfo); in getVOPDInstInfo()
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| /freebsd/contrib/llvm-project/clang/lib/CodeGen/ |
| H A D | CGExprAgg.cpp | 1014 CmpInstInfo InstInfo = [&]() -> CmpInstInfo { in EmitCompare() local
1029 return Builder.CreateFCmp(InstInfo.FCmp, LHS, RHS, in EmitCompare()
1030 llvm::Twine(InstInfo.Name) + NameSuffix); in EmitCompare()
1033 ArgTy->hasSignedIntegerRepresentation() ? InstInfo.SCmp : InstInfo.UCmp; in EmitCompare()
1035 llvm::Twine(InstInfo.Name) + NameSuffix); in EmitCompare()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/X86/AsmParser/ |
| H A D | X86AsmParser.cpp | 91 ParseInstructionInfo *InstInfo; member in __anonee973c6c0111::X86AsmParser
1277 : MCTargetAsmParser(Options, sti, mii), InstInfo(nullptr), in X86AsmParser()
2193 InstInfo->AsmRewrites->emplace_back(AOK_Skip, Start, Len); in RewriteIntelExpression()
2200 InstInfo->AsmRewrites->emplace_back(AOK_Skip, Loc, ExprLen); in RewriteIntelExpression()
2217 InstInfo->AsmRewrites->emplace_back(Loc, ExprLen, Expr); in RewriteIntelExpression()
2259 InstInfo->AsmRewrites->emplace_back(AOK_Label, Loc, Identifier.size(), in ParseIntelInlineAsmIdentifier()
3191 InstInfo = &Info; in ParseInstruction()
3292 InstInfo->AsmRewrites->emplace_back(AOK_Skip, NameEndLoc, in ParseInstruction()
4523 InstInfo->AsmRewrites->emplace_back( in matchAndEmitIntelInstruction()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/ARM/ |
| H A D | ARMFrameLowering.cpp | 599 struct InstInfo { struct
605 SmallVector<InstInfo, 4> Insts;
609 InstInfo Info = {I, SPAdjust, BeforeFPSet}; in addInst()
615 llvm::find_if(Insts, [&](InstInfo &Info) { return Info.I == I; }); in addExtraBytes()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/AsmParser/ |
| H A D | AMDGPUAsmParser.cpp | 3817 const auto &InstInfo = getVOPDInstInfo(Opcode, &MII); in validateVOPDRegBankConstraints() local
3819 InstInfo.getInvalidCompOperandIndex(getVRegIdx, SkipSrc); in validateVOPDRegBankConstraints()
3825 std::max(InstInfo[VOPD::X].getIndexInParsedOperands(CompOprIdx), in validateVOPDRegBankConstraints()
3826 InstInfo[VOPD::Y].getIndexInParsedOperands(CompOprIdx)); in validateVOPDRegBankConstraints()
8889 const auto &InstInfo = getVOPDInstInfo(Inst.getOpcode(), &MII); in cvtVOPD() local
8895 addOp(InstInfo[CompIdx].getIndexOfDstInParsedOperands()); in cvtVOPD()
8899 const auto &CInfo = InstInfo[CompIdx]; in cvtVOPD()
8900 auto CompSrcOperandsNum = InstInfo[CompIdx].getCompParsedSrcOperandsNum(); in cvtVOPD()
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| /freebsd/contrib/llvm-project/llvm/utils/TableGen/ |
| H A D | GlobalISelEmitter.cpp | 295 CodeGenInstruction &InstInfo = Target.getInstruction(Dst.getOperator()); in getInstResultType() local
296 if (!InstInfo.Operands.NumDefs) in getInstResultType()
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