| /freebsd/contrib/llvm-project/llvm/lib/CodeGen/ |
| H A D | MachineCombiner.cpp | 96 unsigned getDepth(SmallVectorImpl<MachineInstr *> &InsInstrs,
104 SmallVectorImpl<MachineInstr *> &InsInstrs,
109 SmallVectorImpl<MachineInstr *> &InsInstrs,
114 SmallVectorImpl<MachineInstr *> &InsInstrs,
120 SmallVectorImpl<MachineInstr *> &InsInstrs,
207 MachineCombiner::getDepth(SmallVectorImpl<MachineInstr *> &InsInstrs, in getDepth() argument
215 for (auto *InstrPtr : InsInstrs) { // for each Use in getDepth()
228 MachineInstr *DefInstr = InsInstrs[II->second]; in getDepth()
258 unsigned NewRootIdx = InsInstrs.size() - 1; in getDepth()
320 MachineInstr &MI, SmallVectorImpl<MachineInstr *> &InsInstrs, in getLatenciesForInstrSequences() argument
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| H A D | TargetInstrInfo.cpp | 1083 SmallVectorImpl<MachineInstr *> &InsInstrs, in reassociateOps() argument
1230 InsInstrs.push_back(MIB1); in reassociateOps()
1231 InsInstrs.push_back(MIB2); in reassociateOps()
1249 SmallVectorImpl<MachineInstr *> &InsInstrs, in genAlternativeCodeSequence() argument
1264 reassociateOps(Root, *Prev, Pattern, InsInstrs, DelInstrs, OperandIndices, in genAlternativeCodeSequence()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/ |
| H A D | AArch64InstrInfo.cpp | 6659 SmallVectorImpl<MachineInstr *> &InsInstrs, unsigned IdxMulOpd, in genFusedMultiply() argument
6713 InsInstrs.push_back(MIB); in genFusedMultiply()
6720 SmallVectorImpl<MachineInstr *> &InsInstrs) { in genFNegatedMAD() argument
6753 InsInstrs.push_back(MIB); in genFNegatedMAD()
6761 SmallVectorImpl<MachineInstr *> &InsInstrs, in genIndexedMultiply() argument
6793 InsInstrs.push_back(MIB); in genIndexedMultiply()
6803 MachineInstr &Root, SmallVectorImpl<MachineInstr *> &InsInstrs, in genFusedMultiplyAcc() argument
6805 return genFusedMultiply(MF, MRI, TII, Root, InsInstrs, IdxMulOpd, MaddOpc, RC, in genFusedMultiplyAcc()
6813 SmallVectorImpl<MachineInstr *> &InsInstrs, in genNeg() argument
6820 InsInstrs.push_back(MIB); in genNeg()
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| H A D | AArch64InstrInfo.h | 449 SmallVectorImpl<MachineInstr *> &InsInstrs,
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| /freebsd/contrib/llvm-project/llvm/lib/Target/PowerPC/ |
| H A D | PPCInstrInfo.h | 241 SmallVectorImpl<MachineInstr *> &InsInstrs,
246 SmallVectorImpl<MachineInstr *> &InsInstrs) const;
367 SmallVectorImpl<MachineInstr *> &InsInstrs,
398 SmallVectorImpl<MachineInstr *> &InsInstrs) const override;
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| H A D | PPCInstrInfo.cpp | 528 SmallVectorImpl<MachineInstr *> &InsInstrs) const { in finalizeInsInstrs()
529 assert(!InsInstrs.empty() && "Instructions set to be inserted is empty!"); in finalizeInsInstrs()
575 for (auto *Inst : InsInstrs) { in finalizeInsInstrs()
590 generateLoadForNewConst(ConstPoolIdx, &Root, C->getType(), InsInstrs); in finalizeInsInstrs()
668 SmallVectorImpl<MachineInstr *> &InsInstrs) const { in generateLoadForNewConst()
712 InsInstrs.insert(InsInstrs.begin(), Load); in generateLoadForNewConst()
713 InsInstrs.insert(InsInstrs.begin(), TOCOffset); in generateLoadForNewConst()
770 SmallVectorImpl<MachineInstr *> &InsInstrs, in genAlternativeCodeSequence() argument
778 reassociateFMA(Root, Pattern, InsInstrs, DelInstrs, InstrIdxForVirtReg); in genAlternativeCodeSequence()
782 TargetInstrInfo::genAlternativeCodeSequence(Root, Pattern, InsInstrs, in genAlternativeCodeSequence()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/RISCV/ |
| H A D | RISCVInstrInfo.h | 263 SmallVectorImpl<MachineInstr *> &InsInstrs) const override;
267 SmallVectorImpl<MachineInstr *> &InsInstrs,
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| H A D | RISCVInstrInfo.cpp | 1594 SmallVectorImpl<MachineInstr *> &InsInstrs) const { in finalizeInsInstrs()
1598 assert(all_of(InsInstrs, in finalizeInsInstrs()
1610 for (auto *NewMI : InsInstrs) { in finalizeInsInstrs()
2218 SmallVectorImpl<MachineInstr *> &InsInstrs, in combineFPFusedMultiply() argument
2252 InsInstrs.push_back(MIB); in combineFPFusedMultiply()
2263 SmallVectorImpl<MachineInstr *> &InsInstrs, in genShXAddAddShift() argument
2313 InsInstrs.push_back(MIB1); in genShXAddAddShift()
2314 InsInstrs.push_back(MIB2); in genShXAddAddShift()
2322 SmallVectorImpl<MachineInstr *> &InsInstrs, in genAlternativeCodeSequence() argument
2328 TargetInstrInfo::genAlternativeCodeSequence(Root, Pattern, InsInstrs, in genAlternativeCodeSequence()
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| /freebsd/contrib/llvm-project/llvm/include/llvm/CodeGen/ |
| H A D | TargetInstrInfo.h | 1234 SmallVectorImpl<MachineInstr *> &InsInstrs) const {} in finalizeInsInstrs() argument
1288 SmallVectorImpl<MachineInstr *> &InsInstrs,
1310 SmallVectorImpl<MachineInstr *> &InsInstrs,
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| /freebsd/contrib/llvm-project/llvm/lib/Target/X86/ |
| H A D | X86InstrInfo.h | 637 SmallVectorImpl<MachineInstr *> &InsInstrs,
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| H A D | X86InstrInfo.cpp | 10713 SmallVectorImpl<MachineInstr *> &InsInstrs, in genAlternativeDpCodeSequence() argument
10796 InsInstrs.push_back(Madd); in genAlternativeDpCodeSequence()
10797 InsInstrs.push_back(Add); in genAlternativeDpCodeSequence()
10803 SmallVectorImpl<MachineInstr *> &InsInstrs, in genAlternativeCodeSequence() argument
10809 TargetInstrInfo::genAlternativeCodeSequence(Root, Pattern, InsInstrs, in genAlternativeCodeSequence()
10813 genAlternativeDpCodeSequence(Root, *this, InsInstrs, DelInstrs, in genAlternativeCodeSequence()
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