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Searched refs:InsInstrs (Results 1 – 11 of 11) sorted by relevance

/freebsd/contrib/llvm-project/llvm/lib/CodeGen/
H A DMachineCombiner.cpp93 unsigned getDepth(SmallVectorImpl<MachineInstr *> &InsInstrs,
101 SmallVectorImpl<MachineInstr *> &InsInstrs,
106 SmallVectorImpl<MachineInstr *> &InsInstrs,
111 SmallVectorImpl<MachineInstr *> &InsInstrs,
117 SmallVectorImpl<MachineInstr *> &InsInstrs,
204 MachineCombiner::getDepth(SmallVectorImpl<MachineInstr *> &InsInstrs, in getDepth() argument
212 for (auto *InstrPtr : InsInstrs) { // for each Use in getDepth()
225 MachineInstr *DefInstr = InsInstrs[II->second]; in getDepth()
255 unsigned NewRootIdx = InsInstrs.size() - 1; in getDepth()
317 MachineInstr &MI, SmallVectorImpl<MachineInstr *> &InsInstrs, in getLatenciesForInstrSequences() argument
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H A DTargetInstrInfo.cpp1080 SmallVectorImpl<MachineInstr *> &InsInstrs, MachineFunction &MF, in reduceAccumulatorTree() argument
1104 InstrIdxForVirtReg.insert(std::make_pair(Dest, InsInstrs.size())); in reduceAccumulatorTree()
1114 InsInstrs.push_back(MIB); in reduceAccumulatorTree()
1315 SmallVectorImpl<MachineInstr *> &InsInstrs, in reassociateOps() argument
1462 InsInstrs.push_back(MIB1); in reassociateOps()
1463 InsInstrs.push_back(MIB2); in reassociateOps()
1481 SmallVectorImpl<MachineInstr *> &InsInstrs, in genAlternativeCodeSequence() argument
1505 reassociateOps(Root, *Prev, Pattern, InsInstrs, DelInstrs, OperandIndices, in genAlternativeCodeSequence()
1558 InstIdxForVirtReg.insert(std::make_pair(AccReg, InsInstrs.size())); in genAlternativeCodeSequence()
1559 InsInstrs.push_back(MIB); in genAlternativeCodeSequence()
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/freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/
H A DAArch64InstrInfo.cpp7455 SmallVectorImpl<MachineInstr *> &InsInstrs, unsigned IdxMulOpd, in genFusedMultiply() argument
7509 InsInstrs.push_back(MIB); in genFusedMultiply()
7516 SmallVectorImpl<MachineInstr *> &InsInstrs) { in genFNegatedMAD() argument
7549 InsInstrs.push_back(MIB); in genFNegatedMAD()
7557 SmallVectorImpl<MachineInstr *> &InsInstrs, in genIndexedMultiply() argument
7589 InsInstrs.push_back(MIB); in genIndexedMultiply()
7599 MachineInstr &Root, SmallVectorImpl<MachineInstr *> &InsInstrs, in genFusedMultiplyAcc() argument
7601 return genFusedMultiply(MF, MRI, TII, Root, InsInstrs, IdxMulOpd, MaddOpc, RC, in genFusedMultiplyAcc()
7609 SmallVectorImpl<MachineInstr *> &InsInstrs, in genNeg() argument
7616 InsInstrs.push_back(MIB); in genNeg()
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H A DAArch64InstrInfo.h467 SmallVectorImpl<MachineInstr *> &InsInstrs,
/freebsd/contrib/llvm-project/llvm/lib/Target/PowerPC/
H A DPPCInstrInfo.h348 SmallVectorImpl<MachineInstr *> &InsInstrs,
353 SmallVectorImpl<MachineInstr *> &InsInstrs) const;
477 SmallVectorImpl<MachineInstr *> &InsInstrs,
508 SmallVectorImpl<MachineInstr *> &InsInstrs) const override;
H A DPPCInstrInfo.cpp526 SmallVectorImpl<MachineInstr *> &InsInstrs) const { in finalizeInsInstrs()
527 assert(!InsInstrs.empty() && "Instructions set to be inserted is empty!"); in finalizeInsInstrs()
573 for (auto *Inst : InsInstrs) { in finalizeInsInstrs()
588 generateLoadForNewConst(ConstPoolIdx, &Root, C->getType(), InsInstrs); in finalizeInsInstrs()
666 SmallVectorImpl<MachineInstr *> &InsInstrs) const { in generateLoadForNewConst()
710 InsInstrs.insert(InsInstrs.begin(), Load); in generateLoadForNewConst()
711 InsInstrs.insert(InsInstrs.begin(), TOCOffset); in generateLoadForNewConst()
768 SmallVectorImpl<MachineInstr *> &InsInstrs, in genAlternativeCodeSequence() argument
776 reassociateFMA(Root, Pattern, InsInstrs, DelInstrs, InstrIdxForVirtReg); in genAlternativeCodeSequence()
780 TargetInstrInfo::genAlternativeCodeSequence(Root, Pattern, InsInstrs, in genAlternativeCodeSequence()
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/freebsd/contrib/llvm-project/llvm/lib/Target/RISCV/
H A DRISCVInstrInfo.h272 SmallVectorImpl<MachineInstr *> &InsInstrs) const override;
276 SmallVectorImpl<MachineInstr *> &InsInstrs,
H A DRISCVInstrInfo.cpp1998 SmallVectorImpl<MachineInstr *> &InsInstrs) const { in finalizeInsInstrs()
2002 assert(all_of(InsInstrs, in finalizeInsInstrs()
2014 for (auto *NewMI : InsInstrs) { in finalizeInsInstrs()
2637 SmallVectorImpl<MachineInstr *> &InsInstrs, in combineFPFusedMultiply() argument
2671 InsInstrs.push_back(MIB); in combineFPFusedMultiply()
2682 SmallVectorImpl<MachineInstr *> &InsInstrs, in genShXAddAddShift() argument
2732 InsInstrs.push_back(MIB1); in genShXAddAddShift()
2733 InsInstrs.push_back(MIB2); in genShXAddAddShift()
2741 SmallVectorImpl<MachineInstr *> &InsInstrs, in genAlternativeCodeSequence() argument
2747 TargetInstrInfo::genAlternativeCodeSequence(Root, Pattern, InsInstrs, in genAlternativeCodeSequence()
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/freebsd/contrib/llvm-project/llvm/include/llvm/CodeGen/
H A DTargetInstrInfo.h1265 SmallVectorImpl<MachineInstr *> &InsInstrs) const {} in finalizeInsInstrs() argument
1319 SmallVectorImpl<MachineInstr *> &InsInstrs,
1354 SmallVectorImpl<MachineInstr *> &InsInstrs,
1376 SmallVectorImpl<MachineInstr *> &InsInstrs,
/freebsd/contrib/llvm-project/llvm/lib/Target/X86/
H A DX86InstrInfo.h684 SmallVectorImpl<MachineInstr *> &InsInstrs,
H A DX86InstrInfo.cpp10800 SmallVectorImpl<MachineInstr *> &InsInstrs, in genAlternativeDpCodeSequence() argument
10883 InsInstrs.push_back(Madd); in genAlternativeDpCodeSequence()
10884 InsInstrs.push_back(Add); in genAlternativeDpCodeSequence()
10890 SmallVectorImpl<MachineInstr *> &InsInstrs, in genAlternativeCodeSequence() argument
10896 TargetInstrInfo::genAlternativeCodeSequence(Root, Pattern, InsInstrs, in genAlternativeCodeSequence()
10900 genAlternativeDpCodeSequence(Root, *this, InsInstrs, DelInstrs, in genAlternativeCodeSequence()