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Searched refs:InsElt (Results 1 – 7 of 7) sorted by relevance

/freebsd/contrib/llvm-project/llvm/lib/Transforms/InstCombine/
H A DInstCombineVectorOps.cpp706 static bool replaceExtractElements(InsertElementInst *InsElt, in replaceExtractElements() argument
709 auto *InsVecType = cast<FixedVectorType>(InsElt->getType()); in replaceExtractElements()
744 if (InsertionBlock != InsElt->getParent()) in replaceExtractElements()
752 if (InsElt->hasOneUse() && isa<InsertElementInst>(InsElt->user_back())) in replaceExtractElements()
1291 static Instruction *foldInsSequenceIntoSplat(InsertElementInst &InsElt) { in foldInsSequenceIntoSplat() argument
1294 if (InsElt.hasOneUse() && isa<InsertElementInst>(InsElt.user_back())) in foldInsSequenceIntoSplat()
1297 VectorType *VecTy = InsElt.getType(); in foldInsSequenceIntoSplat()
1309 Value *SplatVal = InsElt.getOperand(1); in foldInsSequenceIntoSplat()
1310 InsertElementInst *CurrIE = &InsElt; in foldInsSequenceIntoSplat()
1325 if (CurrIE != &InsElt && in foldInsSequenceIntoSplat()
[all …]
H A DInstCombineCasts.cpp732 auto *InsElt = dyn_cast<InsertElementInst>(Trunc.getOperand(0)); in shrinkInsertElt() local
733 if (!InsElt || !InsElt->hasOneUse()) in shrinkInsertElt()
738 Value *VecOp = InsElt->getOperand(0); in shrinkInsertElt()
739 Value *ScalarOp = InsElt->getOperand(1); in shrinkInsertElt()
740 Value *Index = InsElt->getOperand(2); in shrinkInsertElt()
2805 if (auto *InsElt = dyn_cast<InsertElementInst>(Src)) in visitBitCast() local
2806 return new BitCastInst(InsElt->getOperand(1), DestTy); in visitBitCast()
/freebsd/contrib/llvm-project/llvm/lib/CodeGen/GlobalISel/
H A DMachineIRBuilder.cpp768 auto InsElt = buildInsertVectorElement(DstTy, UndefVec, Src, Zero); in buildShuffleSplat() local
770 return buildShuffleVector(DstTy, InsElt, UndefVec, ZeroMask); in buildShuffleSplat()
/freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/GISel/
H A DAArch64InstructionSelector.cpp4671 auto InsElt = in emitVectorConcat() local
4677 constrainSelectedInstRegOperands(*InsElt, TII, TRI, RBI); in emitVectorConcat()
4678 return &*InsElt; in emitVectorConcat()
5281 MachineInstr *InsElt = nullptr; in emitLaneInsert() local
5294 InsElt = MIRBuilder.buildInstr(Opc, {*DstReg}, {SrcReg}) in emitLaneInsert()
5299 InsElt = MIRBuilder.buildInstr(Opc, {*DstReg}, {SrcReg}) in emitLaneInsert()
5304 constrainSelectedInstRegOperands(*InsElt, TII, TRI, RBI); in emitLaneInsert()
5305 return InsElt; in emitLaneInsert()
/freebsd/contrib/llvm-project/llvm/lib/Transforms/Vectorize/
H A DSLPVectorizer.cpp16277 Instruction *InsElt; in gather() local
16285 InsElt = II; in gather()
16288 InsElt = dyn_cast<InsertElementInst>(Vec); in gather()
16289 if (!InsElt) in gather()
16292 GatherShuffleExtractSeq.insert(InsElt); in gather()
16293 CSEBlocks.insert(InsElt->getParent()); in gather()
16304 if (auto *SV = dyn_cast<ShuffleVectorInst>(InsElt); in gather()
16316 InsElt = nullptr; in gather()
16318 InsElt = User; in gather()
16320 InsElt = User; in gather()
[all …]
/freebsd/contrib/llvm-project/llvm/lib/Target/ARM/
H A DARMISelLowering.cpp15583 SDValue InsElt = DAG.getNode(ISD::INSERT_VECTOR_ELT, dl, FloatVT, in PerformInsertEltCombine() local
15585 return DAG.getNode(ISD::BITCAST, dl, VT, InsElt); in PerformInsertEltCombine()
/freebsd/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/
H A DDAGCombiner.cpp26874 if (SDValue InsElt = replaceShuffleOfInsert(SVN)) in visitVECTOR_SHUFFLE() local
26875 return InsElt; in visitVECTOR_SHUFFLE()