Searched refs:Ins2 (Results 1 – 2 of 2) sorted by relevance
| /freebsd/contrib/llvm-project/llvm/lib/Target/ARM/ |
| H A D | ARMISelDAGToDAG.cpp | 3080 SDValue Ins2 = N->getOperand(0); in tryInsertVectorElt() local
3082 if (Ins2.getOpcode() != ISD::INSERT_VECTOR_ELT || !Ins2.hasOneUse() || in tryInsertVectorElt()
3084 !isa<ConstantSDNode>(Ins2.getOperand(2)) || in tryInsertVectorElt()
3085 (VT != MVT::v8f16 && VT != MVT::v8i16) || (Ins2.getValueType() != VT)) in tryInsertVectorElt()
3089 unsigned Lane2 = Ins2.getConstantOperandVal(2); in tryInsertVectorElt()
3096 SDValue Val2 = Ins2.getOperand(1); in tryInsertVectorElt()
3121 ARM::ssub_0 + Lane2 / 2, dl, VT, Ins2.getOperand(0), in tryInsertVectorElt()
3141 Ins2.getOperand(0), SDValue(VINS, 0)); in tryInsertVectorElt()
3153 Ins2.getOperand(0), SDValue(VINS, 0)); in tryInsertVectorElt()
|
| /freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/ |
| H A D | AArch64ISelLowering.cpp | 10625 SDValue Ins2 = in LowerFCOPYSIGN() local
10628 SDValue FCS = DAG.getNode(ISD::FCOPYSIGN, DL, SVT, Ins1, Ins2); in LowerFCOPYSIGN()
|