| /freebsd/contrib/llvm-project/llvm/lib/Target/Mips/ |
| H A D | MipsCCState.h | 47 void PreAnalyzeCallResultForF128(const SmallVectorImpl<ISD::InputArg> &Ins,
64 PreAnalyzeFormalArgumentsForF128(const SmallVectorImpl<ISD::InputArg> &Ins);
67 PreAnalyzeCallResultForVectorFloat(const SmallVectorImpl<ISD::InputArg> &Ins,
71 const SmallVectorImpl<ISD::InputArg> &Ins);
131 void PreAnalyzeFormalArguments(const SmallVectorImpl<ISD::InputArg> &Ins, in PreAnalyzeFormalArguments() argument
136 PreAnalyzeFormalArgumentsForF128(Ins); in PreAnalyzeFormalArguments()
139 void AnalyzeFormalArguments(const SmallVectorImpl<ISD::InputArg> &Ins, in AnalyzeFormalArguments() argument
141 PreAnalyzeFormalArguments(Ins, Fn); in AnalyzeFormalArguments()
142 CCState::AnalyzeFormalArguments(Ins, Fn); in AnalyzeFormalArguments()
151 void PreAnalyzeCallResult(const SmallVectorImpl<ISD::InputArg> &Ins, in PreAnalyzeCallResult() argument
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| H A D | MipsCCState.cpp | 87 const SmallVectorImpl<ISD::InputArg> &Ins, in PreAnalyzeCallResultForF128() argument
89 for (unsigned i = 0; i < Ins.size(); ++i) { in PreAnalyzeCallResultForF128()
112 const SmallVectorImpl<ISD::InputArg> &Ins, const Type *RetTy) { in PreAnalyzeCallResultForVectorFloat() argument
113 for (unsigned i = 0; i < Ins.size(); ++i) { in PreAnalyzeCallResultForVectorFloat()
181 const SmallVectorImpl<ISD::InputArg> &Ins) { in PreAnalyzeFormalArgumentsForF128() argument
183 for (unsigned i = 0; i < Ins.size(); ++i) { in PreAnalyzeFormalArgumentsForF128()
189 if (Ins[i].Flags.isSRet()) { in PreAnalyzeFormalArgumentsForF128()
196 assert(Ins[i].getOrigArgIndex() < MF.getFunction().arg_size()); in PreAnalyzeFormalArgumentsForF128()
197 std::advance(FuncArg, Ins[i].getOrigArgIndex()); in PreAnalyzeFormalArgumentsForF128()
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| /freebsd/contrib/llvm-project/llvm/lib/Transforms/Scalar/ |
| H A D | StraightLineStrengthReduce.cpp | 144 : CandidateKind(CT), Base(B), Index(Idx), Stride(S), Ins(I) {} in Candidate()
171 Instruction *Ins = nullptr; member
270 return (Basis.Ins != C.Ins && // skip the same instruction in isBasisFor()
273 Basis.Ins->getType() == C.Ins->getType() && in isBasisFor()
275 DT->dominates(Basis.Ins->getParent(), C.Ins->getParent()) && in isBasisFor()
303 return isGEPFoldable(cast<GetElementPtrInst>(C.Ins), TTI); in isFoldable()
330 hasOnlyOneNonZeroIndex(cast<GetElementPtrInst>(C.Ins))); in isSimplestForm()
594 IntegerType::get(Basis.Ins->getContext(), IndexOffset.getBitWidth()); in emitBump()
617 assert(Basis.Ins->getParent() != nullptr && "the basis is unlinked"); in rewriteCandidateWithBasis()
623 if (!C.Ins->getParent()) in rewriteCandidateWithBasis()
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| /freebsd/contrib/llvm-project/llvm/lib/CodeGen/ |
| H A D | CallingConvLower.cpp | 85 CCState::AnalyzeFormalArguments(const SmallVectorImpl<ISD::InputArg> &Ins, in AnalyzeFormalArguments() argument
87 unsigned NumArgs = Ins.size(); in AnalyzeFormalArguments()
90 MVT ArgVT = Ins[i].VT; in AnalyzeFormalArguments()
91 ISD::ArgFlagsTy ArgFlags = Ins[i].Flags; in AnalyzeFormalArguments()
162 void CCState::AnalyzeCallResult(const SmallVectorImpl<ISD::InputArg> &Ins, in AnalyzeCallResult() argument
164 for (unsigned i = 0, e = Ins.size(); i != e; ++i) { in AnalyzeCallResult()
165 MVT VT = Ins[i].VT; in AnalyzeCallResult()
166 ISD::ArgFlagsTy Flags = Ins[i].Flags; in AnalyzeCallResult()
264 const SmallVectorImpl<ISD::InputArg> &Ins, in resultsCompatible() argument
270 CCInfo1.AnalyzeCallResult(Ins, CalleeFn); in resultsCompatible()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/PowerPC/ |
| H A D | PPCCCState.h | 25 PreAnalyzeFormalArguments(const SmallVectorImpl<ISD::InputArg> &Ins);
50 void AnalyzeFormalArguments(const SmallVectorImpl<ISD::InputArg> &Ins, in AnalyzeFormalArguments() argument
53 IsFixed.resize(Ins.size(), true); in AnalyzeFormalArguments()
54 CCState::AnalyzeFormalArguments(Ins, Fn); in AnalyzeFormalArguments()
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| H A D | PPCCCState.cpp | 27 const SmallVectorImpl<ISD::InputArg> &Ins) { in PreAnalyzeFormalArguments() argument
28 for (const auto &I : Ins) { in PreAnalyzeFormalArguments()
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| H A D | PPCISelLowering.h | 1247 const SmallVectorImpl<ISD::InputArg> &Ins) const;
1253 const SmallVectorImpl<ISD::InputArg> &Ins, const Function *CallerFunc,
1260 const SmallVectorImpl<ISD::InputArg> &Ins,
1344 const SmallVectorImpl<ISD::InputArg> &Ins,
1352 const SmallVectorImpl<ISD::InputArg> &Ins,
1358 const SmallVectorImpl<ISD::InputArg> &Ins,
1381 const SmallVectorImpl<ISD::InputArg> &Ins, const SDLoc &dl,
1385 const SmallVectorImpl<ISD::InputArg> &Ins, const SDLoc &dl,
1389 const SmallVectorImpl<ISD::InputArg> &Ins, const SDLoc &dl,
1400 const SmallVectorImpl<ISD::InputArg> &Ins,
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| H A D | PPCRegisterInfo.cpp | 1062 MachineBasicBlock::reverse_iterator Ins = MI; in lowerCRBitSpilling() local
1064 ++Ins; in lowerCRBitSpilling()
1067 for (; Ins != Rend; ++Ins) { in lowerCRBitSpilling()
1069 if (Ins->modifiesRegister(SrcReg, TRI)) in lowerCRBitSpilling()
1072 if (Ins->readsRegister(SrcReg, TRI)) in lowerCRBitSpilling()
1076 Ins = MI; in lowerCRBitSpilling()
1080 if (!Ins->isDebugInstr()) in lowerCRBitSpilling()
1085 if (Ins == MBB.rend()) in lowerCRBitSpilling()
1086 Ins = MI; in lowerCRBitSpilling()
1090 switch (Ins->getOpcode()) { in lowerCRBitSpilling()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/SystemZ/ |
| H A D | SystemZCallingConv.h | 51 void AnalyzeFormalArguments(const SmallVectorImpl<ISD::InputArg> &Ins, in AnalyzeFormalArguments() argument
55 for (unsigned i = 0; i < Ins.size(); ++i) in AnalyzeFormalArguments()
59 for (unsigned i = 0; i < Ins.size(); ++i) in AnalyzeFormalArguments()
60 ArgIsShortVector.push_back(IsShortVectorType(Ins[i].ArgVT)); in AnalyzeFormalArguments()
62 CCState::AnalyzeFormalArguments(Ins, Fn); in AnalyzeFormalArguments()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/Lanai/ |
| H A D | LanaiISelLowering.h | 123 const SmallVectorImpl<ISD::InputArg> &Ins,
129 const SmallVectorImpl<ISD::InputArg> &Ins,
135 const SmallVectorImpl<ISD::InputArg> &Ins,
144 const SmallVectorImpl<ISD::InputArg> &Ins,
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| H A D | LanaiISelLowering.cpp | 396 const SmallVectorImpl<ISD::InputArg> &Ins, const SDLoc &DL, in LowerFormalArguments() argument
401 return LowerCCCArguments(Chain, CallConv, IsVarArg, Ins, DL, DAG, InVals); in LowerFormalArguments()
413 SmallVectorImpl<ISD::InputArg> &Ins = CLI.Ins; in LowerCall() local
427 OutVals, Ins, DL, DAG, InVals); in LowerCall()
437 const SmallVectorImpl<ISD::InputArg> &Ins, const SDLoc &DL, in LowerCCCArguments() argument
449 CCInfo.AnalyzeFormalArguments(Ins, CC_Lanai32_Fast); in LowerCCCArguments()
451 CCInfo.AnalyzeFormalArguments(Ins, CC_Lanai32); in LowerCCCArguments()
606 const SmallVectorImpl<ISD::InputArg> &Ins, const SDLoc &DL, in LowerCCCCallTo() argument
770 return LowerCallResult(Chain, InGlue, CallConv, IsVarArg, Ins, DL, DAG, in LowerCCCCallTo()
778 const SmallVectorImpl<ISD::InputArg> &Ins, const SDLoc &DL, in LowerCallResult() argument
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| /freebsd/contrib/llvm-project/llvm/lib/Target/MSP430/ |
| H A D | MSP430ISelLowering.h | 145 const SmallVectorImpl<ISD::InputArg> &Ins,
151 const SmallVectorImpl<ISD::InputArg> &Ins,
157 const SmallVectorImpl<ISD::InputArg> &Ins,
163 const SmallVectorImpl<ISD::InputArg> &Ins,
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| H A D | MSP430ISelLowering.cpp | 447 const SmallVectorImpl<ISD::InputArg> &Ins) { in AnalyzeVarArgs() argument
448 State.AnalyzeFormalArguments(Ins, CC_MSP430_AssignStack); in AnalyzeVarArgs()
551 const SmallVectorImpl<ISD::InputArg> &Ins) { in AnalyzeRetResult() argument
552 State.AnalyzeCallResult(Ins, RetCC_MSP430); in AnalyzeRetResult()
569 const SmallVectorImpl<ISD::InputArg> &Ins, const SDLoc &dl, in LowerFormalArguments() argument
577 return LowerCCCArguments(Chain, CallConv, isVarArg, Ins, dl, DAG, InVals); in LowerFormalArguments()
579 if (Ins.empty()) in LowerFormalArguments()
592 SmallVectorImpl<ISD::InputArg> &Ins = CLI.Ins; in LowerCall() local
609 Outs, OutVals, Ins, dl, DAG, InVals); in LowerCall()
620 const SmallVectorImpl<ISD::InputArg> &Ins, const SDLoc &dl, in LowerCCCArguments() argument
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| /freebsd/contrib/llvm-project/llvm/lib/Target/X86/ |
| H A D | X86ISelLoweringCall.cpp | 1095 const SmallVectorImpl<ISD::InputArg> &Ins, const SDLoc &dl, in LowerCallResult() argument
1104 CCInfo.AnalyzeCallResult(Ins, RetCC_X86); in LowerCallResult()
1294 const SmallVectorImpl<ISD::InputArg> &Ins, in LowerMemArgument() argument
1299 ISD::ArgFlagsTy Flags = Ins[i].Flags; in LowerMemArgument()
1333 EVT ArgVT = Ins[i].ArgVT; in LowerMemArgument()
1348 if (Ins[i].PartOffset == 0) { in LowerMemArgument()
1377 DAG.getIntPtrConstant(Ins[i].PartOffset, dl)); in LowerMemArgument()
1380 DAG.getMachineFunction(), FI, Ins[i].PartOffset)); in LowerMemArgument()
1672 const SmallVectorImpl<ISD::InputArg> &Ins, const SDLoc &dl, in LowerFormalArguments() argument
1698 CCInfo.AnalyzeArguments(Ins, CC_X86); in LowerFormalArguments()
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| /freebsd/contrib/llvm-project/llvm/include/llvm/CodeGen/ |
| H A D | CallingConvLower.h | 262 void AnalyzeFormalArguments(const SmallVectorImpl<ISD::InputArg> &Ins,
266 void AnalyzeArguments(const SmallVectorImpl<ISD::InputArg> &Ins, in AnalyzeArguments() argument
268 AnalyzeFormalArguments(Ins, Fn); in AnalyzeArguments()
301 void AnalyzeCallResult(const SmallVectorImpl<ISD::InputArg> &Ins,
509 const SmallVectorImpl<ISD::InputArg> &Ins,
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| /freebsd/contrib/llvm-project/llvm/include/llvm/Transforms/Instrumentation/ |
| H A D | InstrProfiling.h | |
| /freebsd/contrib/llvm-project/llvm/lib/Target/ARC/ |
| H A D | ARCISelLowering.h | 86 const SmallVectorImpl<ISD::InputArg> &Ins,
100 const SmallVectorImpl<ISD::InputArg> &Ins,
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| H A D | ARCISelLowering.cpp | 269 SmallVectorImpl<ISD::InputArg> &Ins = CLI.Ins; in LowerCall() local
289 RetCCInfo.AnalyzeCallResult(Ins, RetCC_ARC); in LowerCall()
471 const SmallVectorImpl<ISD::InputArg> &Ins, const SDLoc &dl, in LowerFormalArguments() argument
478 return LowerCallArguments(Chain, CallConv, IsVarArg, Ins, dl, DAG, InVals); in LowerFormalArguments()
486 const SmallVectorImpl<ISD::InputArg> &Ins, SDLoc dl, SelectionDAG &DAG, in LowerCallArguments() argument
498 CCInfo.AnalyzeFormalArguments(Ins, CC_ARC); in LowerCallArguments()
552 const ArgDataPair ADP = {ArgIn, Ins[i].Flags}; in LowerCallArguments()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/XCore/ |
| H A D | XCoreISelLowering.h | 145 const SmallVectorImpl<ISD::InputArg> &Ins,
153 const SmallVectorImpl<ISD::InputArg> &Ins,
204 const SmallVectorImpl<ISD::InputArg> &Ins,
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| /freebsd/contrib/llvm-project/llvm/lib/Target/BPF/ |
| H A D | BPFISelLowering.cpp | 327 const SmallVectorImpl<ISD::InputArg> &Ins, const SDLoc &DL, in LowerFormalArguments() argument
343 CCInfo.AnalyzeFormalArguments(Ins, getHasAlu32() ? CC_BPF32 : CC_BPF64); in LowerFormalArguments()
410 auto &Ins = CLI.Ins; in LowerCall() local
530 return LowerCallResult(Chain, InGlue, CallConv, IsVarArg, Ins, CLI.DL, DAG, in LowerCall()
585 const SmallVectorImpl<ISD::InputArg> &Ins, const SDLoc &DL, in LowerCallResult() argument
593 if (Ins.size() > 1) { in LowerCallResult()
595 for (auto &In : Ins) in LowerCallResult()
597 return DAG.getCopyFromReg(Chain, DL, 1, Ins[0].VT, InGlue).getValue(1); in LowerCallResult()
600 CCInfo.AnalyzeCallResult(Ins, getHasAlu32() ? RetCC_BPF32 : RetCC_BPF64); in LowerCallResult()
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| H A D | BPFISelLowering.h | 90 const SmallVectorImpl<ISD::InputArg> &Ins,
104 const SmallVectorImpl<ISD::InputArg> &Ins,
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| /freebsd/contrib/llvm-project/llvm/lib/Target/Sparc/ |
| H A D | SparcISelLowering.h | 131 const SmallVectorImpl<ISD::InputArg> &Ins,
136 const SmallVectorImpl<ISD::InputArg> &Ins,
141 const SmallVectorImpl<ISD::InputArg> &Ins,
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| /freebsd/contrib/llvm-project/llvm/lib/Target/M68k/ |
| H A D | M68kISelLowering.h | 255 const SmallVectorImpl<ISD::InputArg> &Ins,
264 const SmallVectorImpl<ISD::InputArg> &Ins,
322 const SmallVectorImpl<ISD::InputArg> &Ins, SelectionDAG &DAG) const;
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| /freebsd/contrib/llvm-project/llvm/lib/Target/Hexagon/ |
| H A D | HexagonCommonGEP.cpp | 568 std::pair<NodeSymRel::iterator, bool> Ins = EqRel.insert(C); in common() local
569 (void)Ins; in common()
570 assert(Ins.second && "Cannot add a class"); in common()
597 std::pair<ProjMap::iterator,bool> Ins = PM.insert(std::make_pair(&S, Min)); in common() local
598 (void)Ins; in common()
599 assert(Ins.second && "Cannot add minimal element"); in common()
1239 ValueVect Ins; in removeDeadCode() local
1241 Ins.push_back(&I); in removeDeadCode()
1242 for (Value *I : Ins) { in removeDeadCode()
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| /freebsd/contrib/llvm-project/llvm/utils/TableGen/Common/ |
| H A D | CodeGenRegisters.h | 113 std::pair<CompMap::iterator, bool> Ins = Composed.insert(std::pair(A, B)); in addComposite() local
146 return (Ins.second || Ins.first->second == B) ? nullptr : Ins.first->second; in addComposite()
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