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Searched refs:InputVT (Results 1 – 3 of 3) sorted by relevance

/freebsd/contrib/llvm-project/llvm/lib/Target/PowerPC/
H A DPPCISelDAGToDAG.cpp4021 EVT InputVT = LHS.getValueType(); in getSETCCInGPR() local
4022 if (InputVT != MVT::i32 && InputVT != MVT::i64) in getSETCCInGPR()
4027 CC = ISD::getSetCCInverse(CC, InputVT); in getSETCCInGPR()
4029 bool Inputs32Bit = InputVT == MVT::i32; in getSETCCInGPR()
/freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/
H A DAArch64ISelLowering.cpp21762 SDValue InputVT = DAG.getValueType(DataVT); in performST1Combine() local
21765 InputVT = DAG.getValueType(HwSrcVt); in performST1Combine()
21777 InputVT in performST1Combine()
24593 SDValue InputVT = DAG.getValueType(SrcVT); in performScatterStoreCombine() local
24595 InputVT = DAG.getValueType(HwSrcVt); in performScatterStoreCombine()
24610 InputVT}; in performScatterStoreCombine()
/freebsd/contrib/llvm-project/llvm/lib/Target/X86/
H A DX86ISelLowering.cpp12030 MVT InputVT = MVT::getVectorVT(MVT::getIntegerVT(EltBits), NumElements); in lowerShuffleAsSpecificZeroOrAnyExtend() local
12031 SDValue Ext = AnyExt ? DAG.getUNDEF(InputVT) in lowerShuffleAsSpecificZeroOrAnyExtend()
12032 : getZeroVector(InputVT, Subtarget, DAG, DL); in lowerShuffleAsSpecificZeroOrAnyExtend()
12033 InputV = DAG.getBitcast(InputVT, InputV); in lowerShuffleAsSpecificZeroOrAnyExtend()
12034 InputV = DAG.getNode(UnpackLoHi, DL, InputVT, InputV, Ext); in lowerShuffleAsSpecificZeroOrAnyExtend()