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Searched refs:InputArg (Results 1 – 25 of 66) sorted by relevance

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/freebsd/contrib/llvm-project/clang/include/clang/Driver/
H A DInputInfo.h32 InputArg, enumerator
38 const llvm::opt::Arg *InputArg; member
65 : Kind(InputArg), Act(nullptr), Type(_Type), BaseInput(_BaseInput) { in InputInfo()
66 Data.InputArg = _InputArg; in InputInfo()
70 : Kind(InputArg), Act(A), Type(GetActionType(A)), BaseInput(_BaseInput) { in InputInfo()
71 Data.InputArg = _InputArg; in InputInfo()
76 bool isInputArg() const { return Kind == InputArg; } in isInputArg()
89 return *Data.InputArg; in getInputArg()
/freebsd/contrib/llvm-project/llvm/lib/Target/Mips/
H A DMipsCCState.h47 void PreAnalyzeCallResultForF128(const SmallVectorImpl<ISD::InputArg> &Ins,
64 PreAnalyzeFormalArgumentsForF128(const SmallVectorImpl<ISD::InputArg> &Ins);
67 PreAnalyzeCallResultForVectorFloat(const SmallVectorImpl<ISD::InputArg> &Ins,
71 const SmallVectorImpl<ISD::InputArg> &Ins);
131 void PreAnalyzeFormalArguments(const SmallVectorImpl<ISD::InputArg> &Ins, in PreAnalyzeFormalArguments()
139 void AnalyzeFormalArguments(const SmallVectorImpl<ISD::InputArg> &Ins, in AnalyzeFormalArguments()
151 void PreAnalyzeCallResult(const SmallVectorImpl<ISD::InputArg> &Ins, in PreAnalyzeCallResult()
161 void AnalyzeCallResult(const SmallVectorImpl<ISD::InputArg> &Ins, in AnalyzeCallResult()
H A DMipsCCState.cpp87 const SmallVectorImpl<ISD::InputArg> &Ins, in PreAnalyzeCallResultForF128()
112 const SmallVectorImpl<ISD::InputArg> &Ins, const Type *RetTy) { in PreAnalyzeCallResultForVectorFloat()
181 const SmallVectorImpl<ISD::InputArg> &Ins) { in PreAnalyzeFormalArgumentsForF128()
/freebsd/contrib/llvm-project/llvm/lib/Target/Lanai/
H A DLanaiISelLowering.h123 const SmallVectorImpl<ISD::InputArg> &Ins,
129 const SmallVectorImpl<ISD::InputArg> &Ins,
135 const SmallVectorImpl<ISD::InputArg> &Ins,
144 const SmallVectorImpl<ISD::InputArg> &Ins,
/freebsd/contrib/llvm-project/llvm/lib/Target/MSP430/
H A DMSP430ISelLowering.h145 const SmallVectorImpl<ISD::InputArg> &Ins,
151 const SmallVectorImpl<ISD::InputArg> &Ins,
157 const SmallVectorImpl<ISD::InputArg> &Ins,
163 const SmallVectorImpl<ISD::InputArg> &Ins,
H A DMSP430ISelLowering.cpp447 const SmallVectorImpl<ISD::InputArg> &Ins) { in AnalyzeVarArgs()
551 const SmallVectorImpl<ISD::InputArg> &Ins) { in AnalyzeRetResult()
569 const SmallVectorImpl<ISD::InputArg> &Ins, const SDLoc &dl, in LowerFormalArguments()
592 SmallVectorImpl<ISD::InputArg> &Ins = CLI.Ins; in LowerCall()
620 const SmallVectorImpl<ISD::InputArg> &Ins, const SDLoc &dl, in LowerCCCArguments()
809 const SmallVectorImpl<ISD::InputArg> &Ins, const SDLoc &dl, in LowerCCCCallTo()
937 const SmallVectorImpl<ISD::InputArg> &Ins, const SDLoc &dl, in LowerCallResult()
/freebsd/contrib/llvm-project/llvm/include/llvm/CodeGen/
H A DTargetCallingConv.h195 struct InputArg { struct
211 InputArg() = default; argument
212 InputArg(ArgFlagsTy flags, EVT vt, EVT argvt, bool used, in InputArg() argument
H A DCallingConvLower.h262 void AnalyzeFormalArguments(const SmallVectorImpl<ISD::InputArg> &Ins,
266 void AnalyzeArguments(const SmallVectorImpl<ISD::InputArg> &Ins, in AnalyzeArguments()
301 void AnalyzeCallResult(const SmallVectorImpl<ISD::InputArg> &Ins,
509 const SmallVectorImpl<ISD::InputArg> &Ins,
523 // SmallVector<ISD::InputArg, 16> SecPassArg; in AnalyzeArgumentsSecondPass()
/freebsd/contrib/llvm-project/llvm/lib/Target/PowerPC/
H A DPPCCCState.h25 PreAnalyzeFormalArguments(const SmallVectorImpl<ISD::InputArg> &Ins);
50 void AnalyzeFormalArguments(const SmallVectorImpl<ISD::InputArg> &Ins, in AnalyzeFormalArguments()
H A DPPCISelLowering.h1247 const SmallVectorImpl<ISD::InputArg> &Ins) const;
1253 const SmallVectorImpl<ISD::InputArg> &Ins, const Function *CallerFunc,
1260 const SmallVectorImpl<ISD::InputArg> &Ins,
1344 const SmallVectorImpl<ISD::InputArg> &Ins,
1352 const SmallVectorImpl<ISD::InputArg> &Ins,
1358 const SmallVectorImpl<ISD::InputArg> &Ins,
1381 const SmallVectorImpl<ISD::InputArg> &Ins, const SDLoc &dl,
1385 const SmallVectorImpl<ISD::InputArg> &Ins, const SDLoc &dl,
1389 const SmallVectorImpl<ISD::InputArg> &Ins, const SDLoc &dl,
1400 const SmallVectorImpl<ISD::InputArg> &Ins,
[all …]
H A DPPCCCState.cpp27 const SmallVectorImpl<ISD::InputArg> &Ins) { in PreAnalyzeFormalArguments()
/freebsd/contrib/llvm-project/llvm/lib/Target/M68k/
H A DM68kISelLowering.h222 const SmallVectorImpl<ISD::InputArg> &ArgInfo,
255 const SmallVectorImpl<ISD::InputArg> &Ins,
264 const SmallVectorImpl<ISD::InputArg> &Ins,
322 const SmallVectorImpl<ISD::InputArg> &Ins, SelectionDAG &DAG) const;
/freebsd/contrib/llvm-project/llvm/lib/Target/XCore/
H A DXCoreISelLowering.h145 const SmallVectorImpl<ISD::InputArg> &Ins,
153 const SmallVectorImpl<ISD::InputArg> &Ins,
204 const SmallVectorImpl<ISD::InputArg> &Ins,
/freebsd/contrib/llvm-project/llvm/lib/Target/ARC/
H A DARCISelLowering.h86 const SmallVectorImpl<ISD::InputArg> &Ins,
100 const SmallVectorImpl<ISD::InputArg> &Ins,
/freebsd/contrib/llvm-project/llvm/lib/Target/Sparc/
H A DSparcISelLowering.h131 const SmallVectorImpl<ISD::InputArg> &Ins,
136 const SmallVectorImpl<ISD::InputArg> &Ins,
141 const SmallVectorImpl<ISD::InputArg> &Ins,
/freebsd/contrib/llvm-project/llvm/lib/Target/BPF/
H A DBPFISelLowering.h90 const SmallVectorImpl<ISD::InputArg> &Ins,
104 const SmallVectorImpl<ISD::InputArg> &Ins,
/freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/
H A DSIISelLowering.h56 const ISD::InputArg *Arg = nullptr) const;
63 const ISD::InputArg &Arg) const;
144 bool Signed, const ISD::InputArg *Arg = nullptr) const;
383 const SmallVectorImpl<ISD::InputArg> &Ins,
407 const SmallVectorImpl<ISD::InputArg> &Ins,
418 const SmallVectorImpl<ISD::InputArg> &Ins, SelectionDAG &DAG) const;
566 const SmallVectorImpl<ISD::InputArg> &Ins,
H A DR600ISelLowering.h43 const SmallVectorImpl<ISD::InputArg> &Ins,
/freebsd/contrib/llvm-project/llvm/lib/CodeGen/
H A DCallingConvLower.cpp85 CCState::AnalyzeFormalArguments(const SmallVectorImpl<ISD::InputArg> &Ins, in AnalyzeFormalArguments()
162 void CCState::AnalyzeCallResult(const SmallVectorImpl<ISD::InputArg> &Ins, in AnalyzeCallResult()
264 const SmallVectorImpl<ISD::InputArg> &Ins, in resultsCompatible()
/freebsd/contrib/llvm-project/llvm/lib/Target/AVR/
H A DAVRISelLowering.h183 const SmallVectorImpl<ISD::InputArg> &Ins,
190 const SmallVectorImpl<ISD::InputArg> &Ins,
/freebsd/contrib/llvm-project/clang/lib/Driver/
H A DDriver.cpp2791 Arg *InputArg = MakeInputArg(Args, Opts, A->getValue()); in BuildInputs() local
2792 Inputs.push_back(std::make_pair(types::TY_C, InputArg)); in BuildInputs()
2799 Arg *InputArg = MakeInputArg(Args, Opts, A->getValue()); in BuildInputs() local
2800 Inputs.push_back(std::make_pair(types::TY_CXX, InputArg)); in BuildInputs()
3723 void recordHostAction(Action *HostAction, const Arg *InputArg) { in recordHostAction() argument
3725 assert(InputArg && "Invalid input argument"); in recordHostAction()
3728 HostActionToInputArgMap[HostAction] = InputArg; in recordHostAction()
3729 assert(HostActionToInputArgMap[HostAction] == InputArg && in recordHostAction()
3738 addDeviceDependencesToHostAction(Action *HostAction, const Arg *InputArg, in addDeviceDependencesToHostAction() argument
3748 recordHostAction(HostAction, InputArg); in addDeviceDependencesToHostAction()
3797 addHostDependenceToDeviceActions(Action * & HostAction,const Arg * InputArg) addHostDependenceToDeviceActions() argument
3855 appendTopLevelActions(ActionList & AL,Action * HostAction,const Arg * InputArg) appendTopLevelActions() argument
4041 const Arg *InputArg = I.second; handleArguments() local
4174 const Arg *InputArg = I.second; BuildActions() local
4315 const Arg *InputArg = I.second; BuildActions() local
4604 const Arg *InputArg = Input.second; BuildOffloadingActions() local
[all...]
/freebsd/contrib/llvm-project/llvm/lib/Target/LoongArch/
H A DLoongArchISelLowering.h172 const SmallVectorImpl<ISD::InputArg> &Ins,
269 const SmallVectorImpl<ISD::InputArg> &Ins, bool IsRet,
/freebsd/contrib/llvm-project/llvm/lib/Target/Xtensa/
H A DXtensaISelLowering.h68 const SmallVectorImpl<ISD::InputArg> &Ins,
/freebsd/contrib/llvm-project/llvm/lib/Target/SystemZ/
H A DSystemZCallingConv.h51 void AnalyzeFormalArguments(const SmallVectorImpl<ISD::InputArg> &Ins, in AnalyzeFormalArguments()
/freebsd/contrib/llvm-project/llvm/lib/Target/Hexagon/
H A DHexagonISelLowering.h143 const SmallVectorImpl<ISD::InputArg> &Ins, SelectionDAG& DAG) const;
216 const SmallVectorImpl<ISD::InputArg> &Ins,
237 const SmallVectorImpl<ISD::InputArg> &Ins,

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