Searched refs:Input1 (Results 1 – 4 of 4) sorted by relevance
| /freebsd/contrib/llvm-project/llvm/lib/CodeGen/ |
| H A D | ComplexDeinterleavingPass.cpp | 2157 Value *Input1 = ReplaceOperandIfExist(Node, 1); in replaceNode() local
2159 assert(!Input1 || (Input0->getType() == Input1->getType() && in replaceNode()
2162 Builder, Node->Operation, Node->Rotation, Input0, Input1, Accumulator); in replaceNode()
2169 Value *Input1 = ReplaceOperandIfExist(Node, 1); in replaceNode() local
2171 assert(!Input1 || (Input0->getType() == Input1->getType() && in replaceNode()
2178 Input0, Input1); in replaceNode()
2181 Builder, Node->Operation, Node->Rotation, Input0, Input1, in replaceNode()
|
| /freebsd/sys/contrib/device-tree/src/arm64/amlogic/ |
| H A D | meson-axg-jethome-jethub-j1xx.dtsi | 325 "Input2", "Input1", "", "", "", // 45 - 49
|
| /freebsd/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | LegalizeVectorTypes.cpp | 2778 auto &&BuildVector = [NewElts, &DAG = DAG, NewVT, &DL](SDValue &Input1, in SplitVecRes_VECTOR_SHUFFLE()
2781 assert(Input1->getOpcode() == ISD::BUILD_VECTOR && in SplitVecRes_VECTOR_SHUFFLE()
2793 Ops[I] = Input1.getOperand(Idx); in SplitVecRes_VECTOR_SHUFFLE()
3291 SDValue Input1 = N->getOperand(1); in SplitVecRes_PARTIAL_REDUCE_MLA() local
3300 if (getTypeAction(Input1.getValueType()) != TargetLowering::TypeSplitVector) { in SplitVecRes_PARTIAL_REDUCE_MLA()
3301 Lo = DAG.getNode(Opcode, DL, AccLo.getValueType(), AccLo, Input1, Input2); in SplitVecRes_PARTIAL_REDUCE_MLA()
3308 std::tie(Input1Lo, Input1Hi) = DAG.SplitVector(Input1, DL); in SplitVecRes_PARTIAL_REDUCE_MLA()
|
| /freebsd/share/misc/ |
| H A D | pci_vendors | 9183 aa01 1461 Spectra8 CardA Input1
9191 aa05 1465 Spectra8 CardB Input1
9199 aa09 1469 Spectra8 CardC Input1
9207 aa0d 146d Spectra8 CardD Input1
|