| /freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/ |
| H A D | AArch64ISelLowering.cpp | 1339 for (MVT InnerVT : MVT::fixedlen_vector_valuetypes()) { in AArch64TargetLowering() local
1340 setTruncStoreAction(VT, InnerVT, Expand); in AArch64TargetLowering()
1341 setLoadExtAction(ISD::SEXTLOAD, VT, InnerVT, Expand); in AArch64TargetLowering()
1342 setLoadExtAction(ISD::ZEXTLOAD, VT, InnerVT, Expand); in AArch64TargetLowering()
1343 setLoadExtAction(ISD::EXTLOAD, VT, InnerVT, Expand); in AArch64TargetLowering()
1404 for (MVT InnerVT : MVT::fixedlen_vector_valuetypes()) { in AArch64TargetLowering() local
1405 setTruncStoreAction(VT, InnerVT, Expand); in AArch64TargetLowering()
1406 setLoadExtAction(ISD::SEXTLOAD, VT, InnerVT, Expand); in AArch64TargetLowering()
1407 setLoadExtAction(ISD::ZEXTLOAD, VT, InnerVT, Expand); in AArch64TargetLowering()
1408 setLoadExtAction(ISD::EXTLOAD, VT, InnerVT, Expand); in AArch64TargetLowering()
[all …]
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| /freebsd/contrib/llvm-project/llvm/lib/Target/LoongArch/ |
| H A D | LoongArchISelLowering.cpp | 232 for (MVT InnerVT : MVT::fixedlen_vector_valuetypes()) { in LoongArchTargetLowering() local
233 setTruncStoreAction(VT, InnerVT, Expand); in LoongArchTargetLowering()
234 setLoadExtAction(ISD::SEXTLOAD, VT, InnerVT, Expand); in LoongArchTargetLowering()
235 setLoadExtAction(ISD::ZEXTLOAD, VT, InnerVT, Expand); in LoongArchTargetLowering()
236 setLoadExtAction(ISD::EXTLOAD, VT, InnerVT, Expand); in LoongArchTargetLowering()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/SystemZ/ |
| H A D | SystemZISelLowering.cpp | 396 for (MVT InnerVT : MVT::fixedlen_vector_valuetypes()) { in SystemZTargetLowering() local
397 setTruncStoreAction(VT, InnerVT, Expand); in SystemZTargetLowering()
398 setLoadExtAction(ISD::SEXTLOAD, VT, InnerVT, Expand); in SystemZTargetLowering()
399 setLoadExtAction(ISD::ZEXTLOAD, VT, InnerVT, Expand); in SystemZTargetLowering()
400 setLoadExtAction(ISD::EXTLOAD, VT, InnerVT, Expand); in SystemZTargetLowering()
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| /freebsd/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | TargetLowering.cpp | 1770 EVT InnerVT = InnerOp.getValueType(); in SimplifyDemandedBits() local
1771 unsigned InnerBits = InnerVT.getScalarSizeInBits(); in SimplifyDemandedBits()
1773 isTypeDesirableForOp(ISD::SHL, InnerVT)) { in SimplifyDemandedBits()
1775 ISD::SHL, dl, InnerVT, InnerOp, in SimplifyDemandedBits()
1776 TLO.DAG.getShiftAmountConstant(ShAmt, InnerVT, dl)); in SimplifyDemandedBits()
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| H A D | DAGCombiner.cpp | 9951 EVT InnerVT = N0Op0.getValueType(); in visitSHL() local
9952 uint64_t InnerBitwidth = InnerVT.getScalarSizeInBits(); in visitSHL()
26083 EVT InnerVT = BC0->getValueType(0); in visitVECTOR_SHUFFLE() local
26084 EVT InnerSVT = InnerVT.getScalarType(); in visitVECTOR_SHUFFLE()
26087 EVT ScaleVT = SVT.bitsLT(InnerSVT) ? VT : InnerVT; in visitVECTOR_SHUFFLE()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/PowerPC/ |
| H A D | PPCISelLowering.cpp | 886 for (MVT InnerVT : MVT::fixedlen_vector_valuetypes()) { in PPCTargetLowering() local
887 setTruncStoreAction(VT, InnerVT, Expand); in PPCTargetLowering()
888 setLoadExtAction(ISD::SEXTLOAD, VT, InnerVT, Expand); in PPCTargetLowering()
889 setLoadExtAction(ISD::ZEXTLOAD, VT, InnerVT, Expand); in PPCTargetLowering()
890 setLoadExtAction(ISD::EXTLOAD, VT, InnerVT, Expand); in PPCTargetLowering()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/RISCV/ |
| H A D | RISCVISelLowering.cpp | 1287 for (MVT InnerVT : MVT::fp_fixedlen_vector_valuetypes()) { in RISCVTargetLowering() local
1288 setLoadExtAction(ISD::EXTLOAD, VT, InnerVT, Expand); in RISCVTargetLowering()
1289 setTruncStoreAction(VT, InnerVT, Expand); in RISCVTargetLowering()
9813 auto InnerVT = VecVT.bitsLE(M1VT) ? VecVT : M1VT; in lowerReductionSeq()
9818 SDValue InitialValue = lowerScalarInsert(StartValue, InnerVL, InnerVT, DL, in lowerReductionSeq()
9820 if (M1VT != InnerVT) in lowerReductionSeq()
9811 auto InnerVT = VecVT.bitsLE(M1VT) ? VecVT : M1VT; lowerReductionSeq() local
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| /freebsd/contrib/llvm-project/llvm/lib/Target/X86/ |
| H A D | X86ISelLowering.cpp | 1015 for (MVT InnerVT : MVT::fixedlen_vector_valuetypes()) { in X86TargetLowering() local
1016 setTruncStoreAction(InnerVT, VT, Expand); in X86TargetLowering()
1018 setLoadExtAction(ISD::SEXTLOAD, InnerVT, VT, Expand); in X86TargetLowering()
1019 setLoadExtAction(ISD::ZEXTLOAD, InnerVT, VT, Expand); in X86TargetLowering()
1026 setLoadExtAction(ISD::EXTLOAD, InnerVT, VT, Expand); in X86TargetLowering()
1032 setLoadExtAction(ISD::EXTLOAD, InnerVT, VT, Expand); in X86TargetLowering()
22546 EVT InnerVT = Inner.getValueType(); in MatchVectorAllEqualTest() local
22547 if (llvm::has_single_bit<uint32_t>(InnerVT.getSizeInBits())) { in MatchVectorAllEqualTest()
22548 unsigned BW = InnerVT.getScalarSizeInBits(); in MatchVectorAllEqualTest()
22552 DAG.getConstant(Cmp, DL, InnerVT), CC, in MatchVectorAllEqualTest()
[all …]
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| /freebsd/contrib/llvm-project/llvm/lib/Target/ARM/ |
| H A D | ARMISelLowering.cpp | 809 for (MVT InnerVT : MVT::fixedlen_vector_valuetypes()) { in ARMTargetLowering() local
810 setTruncStoreAction(VT, InnerVT, Expand); in ARMTargetLowering()
811 addAllExtLoads(VT, InnerVT, Expand); in ARMTargetLowering()
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