Searched refs:InVec1 (Results 1 – 2 of 2) sorted by relevance
| /freebsd/contrib/llvm-project/llvm/lib/Target/X86/ |
| H A D | X86ISelLowering.cpp | 7923 SDValue InVec1 = DAG.getUNDEF(VT); in isAddSubOrSubAdd() local
7972 if (InVec1.isUndef()) { in isAddSubOrSubAdd()
7973 InVec1 = Op1.getOperand(0); in isAddSubOrSubAdd()
7974 if (InVec1.getSimpleValueType() != VT) in isAddSubOrSubAdd()
7991 if (InVec1 != Op1.getOperand(0)) in isAddSubOrSubAdd()
8002 InVec0.isUndef() || InVec1.isUndef()) in isAddSubOrSubAdd()
8008 Opnd1 = InVec1; in isAddSubOrSubAdd()
8273 SDValue InVec0, InVec1; in LowerToHorizontalOp() local
8279 if (isHorizontalBinOpPart(BV, ISD::ADD, DL, DAG, 0, Half, InVec0, InVec1) && in LowerToHorizontalOp()
8283 ((InVec1.isUndef() || InVec3.isUndef()) || InVec1 == InVec3)) in LowerToHorizontalOp()
[all …]
|
| /freebsd/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | SelectionDAGBuilder.cpp | 12460 SDValue InVec1 = getValue(I.getOperand(1)); in visitVectorInterleave() local
12468 SDValue V = DAG.getNode(ISD::CONCAT_VECTORS, DL, OutVT, InVec0, InVec1); in visitVectorInterleave()
12475 DAG.getVTList(InVT, InVT), InVec0, InVec1); in visitVectorInterleave()
|