Searched refs:InVec0 (Results 1 – 2 of 2) sorted by relevance
| /freebsd/contrib/llvm-project/llvm/lib/Target/X86/ |
| H A D | X86ISelLowering.cpp | 7922 SDValue InVec0 = DAG.getUNDEF(VT); in isAddSubOrSubAdd() local
7967 if (InVec0.isUndef()) { in isAddSubOrSubAdd()
7968 InVec0 = Op0.getOperand(0); in isAddSubOrSubAdd()
7969 if (InVec0.getSimpleValueType() != VT) in isAddSubOrSubAdd()
7980 if (InVec0 != Op0.getOperand(0)) { in isAddSubOrSubAdd()
7987 if (InVec0 != Op0.getOperand(0)) in isAddSubOrSubAdd()
8002 InVec0.isUndef() || InVec1.isUndef()) in isAddSubOrSubAdd()
8007 Opnd0 = InVec0; in isAddSubOrSubAdd()
8273 SDValue InVec0, InVec1; in LowerToHorizontalOp() local
8279 if (isHorizontalBinOpPart(BV, ISD::ADD, DL, DAG, 0, Half, InVec0, InVec1) && in LowerToHorizontalOp()
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| /freebsd/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | SelectionDAGBuilder.cpp | 12459 SDValue InVec0 = getValue(I.getOperand(0)); in visitVectorInterleave() local
12468 SDValue V = DAG.getNode(ISD::CONCAT_VECTORS, DL, OutVT, InVec0, InVec1); in visitVectorInterleave()
12475 DAG.getVTList(InVT, InVT), InVec0, InVec1); in visitVectorInterleave()
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