Home
last modified time | relevance | path

Searched refs:InVT (Results 1 – 20 of 20) sorted by relevance

/freebsd/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/
H A DLegalizeVectorTypes.cpp1553 EVT InVT = InOp.getValueType(); in SplitVecRes_BITCAST() local
1556 switch (getTypeAction(InVT)) { in SplitVecRes_BITCAST()
1853 EVT InVT = Op.getValueType(); in SplitVecRes_StrictFPOp() local
1854 if (InVT.isVector()) { in SplitVecRes_StrictFPOp()
1857 if (getTypeAction(InVT) == TargetLowering::TypeSplitVector) in SplitVecRes_StrictFPOp()
2603 EVT InVT = N->getOperand(0).getValueType(); in SplitVecRes_UnaryOp() local
2604 if (getTypeAction(InVT) == TargetLowering::TypeSplitVector) in SplitVecRes_UnaryOp()
2643 EVT InVT = N->getOperand(0).getValueType(); in SplitVecRes_ADDRSPACECAST() local
2644 if (getTypeAction(InVT) == TargetLowering::TypeSplitVector) in SplitVecRes_ADDRSPACECAST()
2666 EVT InVT = N->getOperand(0).getValueType(); in SplitVecRes_UnaryOpWithTwoResults() local
[all …]
H A DLegalizeTypesGeneric.cpp44 EVT InVT = InOp.getValueType(); in ExpandRes_BITCAST() local
48 switch (getTypeAction(InVT)) { in ExpandRes_BITCAST()
66 if (TLI.hasBigEndianPartOrdering(InVT, DL) != in ExpandRes_BITCAST()
89 assert(!(InVT.getVectorNumElements() & 1) && "Unsupported BITCAST"); in ExpandRes_BITCAST()
92 std::tie(LoVT, HiVT) = DAG.GetSplitDestVTs(InVT); in ExpandRes_BITCAST()
102 if (InVT.isVector() && OutVT.isInteger()) { in ExpandRes_BITCAST()
162 Align InAlign = DAG.getReducedAlign(InVT, /*UseABI=*/false); in ExpandRes_BITCAST()
165 SDValue StackPtr = DAG.CreateStackTemporary(InVT.getStoreSize(), Align); in ExpandRes_BITCAST()
H A DLegalizeIntegerTypes.cpp481 EVT InVT = InOp.getValueType(); in PromoteIntRes_BITCAST() local
482 EVT NInVT = TLI.getTypeToTransformTo(*DAG.getContext(), InVT); in PromoteIntRes_BITCAST()
487 switch (getTypeAction(InVT)) { in PromoteIntRes_BITCAST()
549 unsigned ShiftAmt = NInVT.getSizeInBits() - InVT.getSizeInBits(); in PromoteIntRes_BITCAST()
1381 EVT InVT = N->getOperand(OpNo).getValueType(); in PromoteIntRes_SETCC() local
1384 EVT SVT = getSetCCResultType(InVT); in PromoteIntRes_SETCC()
1390 if (getTypeAction(InVT) == TargetLowering::TypePromoteInteger) { in PromoteIntRes_SETCC()
1391 InVT = TLI.getTypeToTransformTo(*DAG.getContext(), InVT); in PromoteIntRes_SETCC()
1392 SVT = getSetCCResultType(InVT); in PromoteIntRes_SETCC()
1692 EVT InVT = InOp.getValueType(); in PromoteIntRes_TRUNCATE() local
[all …]
H A DDAGCombiner.cpp24480 EVT InVT = Vec.getValueType(); in reduceBuildVecToShuffle() local
24492 if (InVT.isSimple() && NearestPow2 > 2 && MaxIndex < NearestPow2 && in reduceBuildVecToShuffle()
24496 InVT.getVectorElementType(), SplitSize); in reduceBuildVecToShuffle()
24499 InVT.getVectorNumElements()) { in reduceBuildVecToShuffle()
24683 EVT InVT = EVT::getVectorVT(*DAG.getContext(), InSVT, NumElems); in convertBuildVecZextToZext() local
24686 if (LegalTypes && !TLI.isTypeLegal(InVT)) in convertBuildVecZextToZext()
24696 In = DAG.getNode(ISD::EXTRACT_SUBVECTOR, DL, InVT, In, in convertBuildVecZextToZext()
25963 EVT InVT = V.getValueType(); in visitEXTRACT_SUBVECTOR() local
25965 unsigned EltSize = InVT.getScalarSizeInBits(); in visitEXTRACT_SUBVECTOR()
25969 EVT EltVT = InVT.getVectorElementType(); in visitEXTRACT_SUBVECTOR()
[all …]
H A DSelectionDAG.cpp4044 EVT InVT = Op.getOperand(0).getValueType(); in computeKnownBits() local
4045 APInt InDemandedElts = DemandedElts.zext(InVT.getVectorNumElements()); in computeKnownBits()
4058 EVT InVT = Op.getOperand(0).getValueType(); in computeKnownBits() local
4059 APInt InDemandedElts = DemandedElts.zext(InVT.getVectorNumElements()); in computeKnownBits()
4076 EVT InVT = Op.getOperand(0).getValueType(); in computeKnownBits() local
4077 APInt InDemandedElts = DemandedElts.zext(InVT.getVectorNumElements()); in computeKnownBits()
H A DLegalizeDAG.cpp2296 EVT InVT = Node->getOperand(Node->isStrictFPOpcode() ? 1 : 0).getValueType(); in ExpandArgFPLibCall() local
2297 RTLIB::Libcall LC = RTLIB::getFPLibCall(InVT.getSimpleVT(), in ExpandArgFPLibCall()
H A DSelectionDAGBuilder.cpp12616 EVT InVT = getValue(I.getOperand(0)).getValueType(); in visitVectorInterleave() local
12629 unsigned NumElts = InVT.getVectorMinNumElements(); in visitVectorInterleave()
12636 SmallVector<EVT, 8> ValueVTs(Factor, InVT); in visitVectorInterleave()
/freebsd/contrib/llvm-project/llvm/lib/Target/WebAssembly/
H A DWebAssemblyISelLowering.cpp2921 EVT InVT = N->getOperand(0)->getValueType(0); in performVectorExtendToFPCombine() local
2924 if (ResVT == MVT::v4f32 && (InVT == MVT::v4i16 || InVT == MVT::v4i8)) in performVectorExtendToFPCombine()
2926 else if (ResVT == MVT::v2f64 && (InVT == MVT::v2i16 || InVT == MVT::v2i8)) in performVectorExtendToFPCombine()
3155 EVT InVT = MVT::i16, OutVT = MVT::i8; in truncateVectorWithNARROW() local
3157 InVT = MVT::i32; in truncateVectorWithNARROW()
3161 InVT = EVT::getVectorVT(Ctx, InVT, SubSizeInBits / InVT.getSizeInBits()); in truncateVectorWithNARROW()
3170 Lo = DAG.getBitcast(InVT, Lo); in truncateVectorWithNARROW()
3171 Hi = DAG.getBitcast(InVT, Hi); in truncateVectorWithNARROW()
3191 EVT InVT = In.getValueType(); in performTruncateCombine() local
3192 if (!InVT.isSimple()) in performTruncateCombine()
[all …]
/freebsd/contrib/llvm-project/llvm/utils/TableGen/Common/
H A DCodeGenDAGPatterns.h262 bool MergeInTypeInfo(TypeSetByHwMode &Out, MVT::SimpleValueType InVT) const { in MergeInTypeInfo()
263 return MergeInTypeInfo(Out, TypeSetByHwMode(InVT)); in MergeInTypeInfo()
266 const ValueTypeByHwMode &InVT) const { in MergeInTypeInfo()
267 return MergeInTypeInfo(Out, TypeSetByHwMode(InVT)); in MergeInTypeInfo()
/freebsd/contrib/llvm-project/llvm/lib/Target/X86/
H A DX86ISelLowering.cpp4747 EVT InVT = In.getValueType(); in getEXTEND_VECTOR_INREG() local
4748 assert(VT.isVector() && InVT.isVector() && "Expected vector VTs."); in getEXTEND_VECTOR_INREG()
4770 if (InVT.getSizeInBits() > 128) { in getEXTEND_VECTOR_INREG()
4771 assert(VT.getSizeInBits() == InVT.getSizeInBits() && in getEXTEND_VECTOR_INREG()
4773 unsigned Scale = VT.getScalarSizeInBits() / InVT.getScalarSizeInBits(); in getEXTEND_VECTOR_INREG()
4776 InVT = In.getValueType(); in getEXTEND_VECTOR_INREG()
4779 if (VT.getVectorNumElements() != InVT.getVectorNumElements()) in getEXTEND_VECTOR_INREG()
20870 MVT InVT = In.getSimpleValueType(); in LowerAVXExtend() local
20873 assert(VT.isVector() && InVT.isVector() && "Expected vector type"); in LowerAVXExtend()
20876 assert(VT.getVectorNumElements() == InVT.getVectorNumElements() && in LowerAVXExtend()
[all …]
H A DX86InstrAVX512.td167 X86VectorVTInfo InVT,
172 !con((ins InVT.RC:$src1), NonTiedIns),
173 !con((ins InVT.RC:$src1, InVT.KRCWM:$mask), NonTiedIns),
174 !con((ins InVT.RC:$src1, InVT.KRCWM:$mask), NonTiedIns),
176 (vselect_mask InVT.KRCWM:$mask, RHS,
177 (bitconvert InVT.RC:$src1)),
/freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/
H A DAArch64ISelLowering.cpp4500 EVT InVT = Op.getOperand(IsStrict ? 1 : 0).getValueType(); in LowerVectorFP_TO_INT() local
4507 if ((InVT.getVectorElementType() == MVT::f16 && !Subtarget->hasFullFP16()) || in LowerVectorFP_TO_INT()
4508 InVT.getVectorElementType() == MVT::bf16) { in LowerVectorFP_TO_INT()
4532 if (InVT == MVT::nxv8f32) in LowerVectorFP_TO_INT()
4542 useSVEForFixedLengthVectorVT(InVT, !Subtarget->isNeonAvailable())) in LowerVectorFP_TO_INT()
4546 uint64_t InVTSize = InVT.getFixedSizeInBits(); in LowerVectorFP_TO_INT()
4550 InVT = InVT.changeVectorElementTypeToInteger(); in LowerVectorFP_TO_INT()
4551 SDValue Cv = DAG.getNode(Op.getOpcode(), DL, {InVT, MVT::Other}, in LowerVectorFP_TO_INT()
4557 DAG.getNode(Op.getOpcode(), DL, InVT.changeVectorElementTypeToInteger(), in LowerVectorFP_TO_INT()
4579 if (InVT.getVectorNumElements() == 1) { in LowerVectorFP_TO_INT()
[all …]
H A DAArch64ISelDAGToDAG.cpp4531 EVT InVT = N->getOperand(1).getValueType(); in trySelectCastFixedLengthToScalableVector() local
4532 if (VT.isFixedLengthVector() || InVT.isScalableVector()) in trySelectCastFixedLengthToScalableVector()
4534 if (InVT.getSizeInBits() <= 128) in trySelectCastFixedLengthToScalableVector()
4560 EVT InVT = N->getOperand(0).getValueType(); in trySelectCastScalableToFixedLengthVector() local
4561 if (VT.isScalableVector() || InVT.isFixedLengthVector()) in trySelectCastScalableToFixedLengthVector()
4570 assert(InVT.getSizeInBits().getKnownMinValue() == AArch64::SVEBitsPerBlock && in trySelectCastScalableToFixedLengthVector()
H A DSVEInstrFormats.td2950 ValueType OutVT, ValueType InVT,
2953 …def : SVE_4_Op_Imm_Pat<OutVT, op, OutVT, InVT, InVT, i32, VectorIndexH32b_timm, !cast<Instruction>…
2987 ValueType InVT, SDPatternOperator op> {
2989 def : SVE_3_Op_Pat<OutVT, op, OutVT, InVT, InVT, !cast<Instruction>(NAME)>;
9417 string asm, ValueType InVT, SDPatternOperator op> {
9419 def : SVE_3_Op_Pat<nxv4f32, op, nxv4f32, InVT, InVT, !cast<Instruction>(NAME)>;
9456 ZPRRegOp src2_ty, string asm, ValueType InVT,
9463 …def : SVE_4_Op_Imm_Pat<nxv4f32, op, nxv4f32, InVT, InVT, i32, VectorIndexS32b_timm, !cast<Instruct…
/freebsd/contrib/llvm-project/llvm/lib/Target/SystemZ/
H A DSystemZISelLowering.cpp4286 EVT InVT = In.getValueType(); in lowerBITCAST() local
4301 if (InVT == MVT::i32 && ResVT == MVT::f32) { in lowerBITCAST()
4317 if (InVT == MVT::f32 && ResVT == MVT::i32) { in lowerBITCAST()
5754 MVT InVT = MVT::getVectorVT(MVT::getIntegerVT(InBytes * 8), in getPermuteNode() local
5756 Op0 = DAG.getNode(ISD::BITCAST, DL, InVT, Op0); in getPermuteNode()
5757 Op1 = DAG.getNode(ISD::BITCAST, DL, InVT, Op1); in getPermuteNode()
5761 Op = DAG.getNode(SystemZISD::PERMUTE_DWORDS, DL, InVT, Op0, Op1, Op2); in getPermuteNode()
5767 Op = DAG.getNode(P.Opcode, DL, InVT, Op0, Op1); in getPermuteNode()
6158 EVT InVT = MVT::getVectorVT(MVT::getIntegerVT(InBits), in insertUnpackIfPrepared() local
6160 SDValue PackedOp = DAG.getNode(ISD::BITCAST, DL, InVT, Op); in insertUnpackIfPrepared()
[all …]
/freebsd/contrib/llvm-project/llvm/lib/Target/PowerPC/
H A DPPCISelDAGToDAG.cpp3098 EVT InVT = InputOp.getValueType(); in computeLogicOpInGPR() local
3099 return SDValue(CurDAG->getMachineNode(InVT == MVT::i32 ? PPC::RLDICL_32 : in computeLogicOpInGPR()
3100 PPC::RLDICL, dl, InVT, InputOp, in computeLogicOpInGPR()
3243 EVT InVT = LHS.getValueType(); in getCompoundZeroComparisonInGPR() local
3244 bool Is32Bit = InVT == MVT::i32; in getCompoundZeroComparisonInGPR()
3252 dl, InVT, LHS, LHS), 0); in getCompoundZeroComparisonInGPR()
5820 EVT InVT = N->getOperand(0).getValueType(); in Select() local
5821 assert((InVT == MVT::i64 || InVT == MVT::i32) && in Select()
5824 unsigned Opcode = (InVT == MVT::i64) ? PPC::ANDI8_rec : PPC::ANDI_rec; in Select()
5825 SDValue AndI(CurDAG->getMachineNode(Opcode, dl, InVT, MVT::Glue, in Select()
[all …]
H A DPPCISelLowering.cpp8827 EVT InVT = Src.getValueType(); in LowerINT_TO_FP() local
8830 isOperationCustom(Op.getOpcode(), InVT)) in LowerINT_TO_FP()
/freebsd/contrib/llvm-project/llvm/lib/Target/RISCV/
H A DRISCVISelDAGToDAG.cpp2590 MVT InVT = V.getSimpleValueType(); in Select() local
2600 if (InVT.isFixedLengthVector()) in Select()
2601 InVT = TLI.getContainerForFixedLengthVector(InVT); in Select()
2607 InVT, SubVecContainerVT, Idx, TRI); in Select()
2618 unsigned InRegClassID = RISCVTargetLowering::getRegClassIDForVecVT(InVT); in Select()
H A DRISCVISelLowering.cpp12709 MVT InVT = Op.getOperand(0).getSimpleValueType(); in lowerFixedLengthVectorSetccToRVV() local
12710 MVT ContainerVT = getContainerForFixedLengthVector(InVT); in lowerFixedLengthVectorSetccToRVV()
12741 MVT InVT = Op1.getSimpleValueType(); in lowerVectorStrictFSetcc() local
12773 MVT ContainerInVT = InVT; in lowerVectorStrictFSetcc()
12774 if (InVT.isFixedLengthVector()) { in lowerVectorStrictFSetcc()
12775 ContainerInVT = getContainerForFixedLengthVector(InVT); in lowerVectorStrictFSetcc()
12781 auto [Mask, VL] = getDefaultVLOps(InVT, ContainerInVT, DL, DAG, Subtarget); in lowerVectorStrictFSetcc()
/freebsd/contrib/llvm-project/llvm/lib/Target/LoongArch/
H A DLoongArchISelLowering.cpp4344 EVT InVT = In.getValueType(); in ReplaceNodeResults() local
4345 EVT InEltVT = InVT.getVectorElementType(); in ReplaceNodeResults()
4349 unsigned InBits = InVT.getSizeInBits(); in ReplaceNodeResults()