Searched refs:Immr (Results 1 – 4 of 4) sorted by relevance
| /freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/MCTargetDesc/ |
| H A D | AArch64AddressingModes.h | 252 // Encode in Immr the number of RORs it would take to get *from* 0^m 1^n in processLogicalImmediate()
256 unsigned Immr = (Size - I) & (Size - 1); in processLogicalImmediate()
269 Encoding = (N << 12) | (Immr << 6) | (NImms & 0x3f); in processLogicalImmediate()
257 unsigned Immr = (Size - I) & (Size - 1); processLogicalImmediate() local
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| /freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/ |
| H A D | AArch64ISelDAGToDAG.cpp | 2534 SDValue &Opd0, unsigned &Immr, in isBitfieldExtractOpFromSExtInReg() argument
2561 Immr = ShiftImm; in isBitfieldExtractOpFromSExtInReg()
2607 unsigned &Immr, unsigned &Imms, in isBitfieldExtractOpFromShr() argument
2621 if (isSeveralBitsExtractOpFromShr(N, Opc, Opd0, Immr, Imms)) in isBitfieldExtractOpFromShr()
2663 Immr = immr < 0 ? immr + VT.getSizeInBits() : immr; in isBitfieldExtractOpFromShr()
2689 unsigned Immr = ShiftImm; in tryBitfieldExtractOpFromSExt() local
2691 SDValue Ops[] = {Opd0, CurDAG->getTargetConstant(Immr, dl, VT), in tryBitfieldExtractOpFromSExt()
2698 SDValue &Opd0, unsigned &Immr, unsigned &Imms, in isBitfieldExtractOp() argument
2710 return isBitfieldExtractOpFromAnd(CurDAG, N, Opc, Opd0, Immr, Imms, in isBitfieldExtractOp()
2714 return isBitfieldExtractOpFromShr(N, Opc, Opd0, Immr, Imms, BiggerPattern); in isBitfieldExtractOp()
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| H A D | AArch64LoadStoreOptimizer.cpp | 1208 int Immr = 8 * (UnscaledLdOffset - UnscaledStOffset); in promoteLoadFromStore() local
1209 int Imms = Immr + Width - 1; in promoteLoadFromStore()
1212 | ((Immr) << 6) // immr in promoteLoadFromStore()
1229 .addImm(Immr) in promoteLoadFromStore()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/GISel/ |
| H A D | AArch64InstructionSelector.cpp | 2417 int64_t Immr = Size - ShiftImm; in earlySelect() local
2420 emitInstr(Opc, {Dst}, {MaskSrc, ShiftSrc, Immr, Imms}, MIB); in earlySelect()
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