/freebsd/contrib/llvm-project/llvm/lib/Target/X86/ |
H A D | X86EvexToVex.cpp |
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H A D | X86CompressEVEX.cpp | 145 int64_t ImmVal = Imm.getImm(); in performCustomAdjustments() local 147 Imm.setImm(0x20 | ((ImmVal & 2) << 3) | (ImmVal & 1)); in performCustomAdjustments() 167 int64_t ImmVal = Imm.getImm(); in performCustomAdjustments() local 169 if ((ImmVal & 0xf) != ImmVal) in performCustomAdjustments()
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H A D | X86InstrInfo.h | 190 int64_t ImmVal, MachineRegisterInfo *MRI, 391 int64_t &ImmVal) const override;
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/freebsd/contrib/llvm-project/llvm/utils/TableGen/Common/ |
H A D | PredicateExpander.cpp | 23 int ImmVal, in expandCheckImmOperand() argument 31 OS << (shouldNegate() ? " != " : " == ") << ImmVal; in expandCheckImmOperand() 35 StringRef ImmVal, in expandCheckImmOperand() argument 37 if (ImmVal.empty()) in expandCheckImmOperand() 46 OS << (shouldNegate() ? " != " : " == ") << ImmVal; in expandCheckImmOperand() 63 int ImmVal, in expandCheckImmOperandLT() argument 71 OS << (shouldNegate() ? " >= " : " < ") << ImmVal; in expandCheckImmOperandLT() 75 int ImmVal, in expandCheckImmOperandGT() argument 83 OS << (shouldNegate() ? " <= " : " > ") << ImmVal; in expandCheckImmOperandGT()
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H A D | PredicateExpander.h | 58 void expandCheckImmOperand(raw_ostream &OS, int OpIndex, int ImmVal, 60 void expandCheckImmOperand(raw_ostream &OS, int OpIndex, StringRef ImmVal, 64 void expandCheckImmOperandLT(raw_ostream &OS, int OpIndex, int ImmVal, 66 void expandCheckImmOperandGT(raw_ostream &OS, int OpIndex, int ImmVal,
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/freebsd/contrib/llvm-project/llvm/include/llvm/MC/ |
H A D | MCInst.h | 50 int64_t ImmVal; member 82 return ImmVal; in getImm() 87 ImmVal = Val; in setImm() 144 Op.ImmVal = Val; in createImm()
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/freebsd/contrib/llvm-project/llvm/lib/Target/VE/ |
H A D | VEInstrInfo.cpp | 583 int64_t ImmVal; in foldImmediate() local 594 ImmVal = in foldImmediate() 596 LLVM_DEBUG(dbgs() << "ImmVal is " << ImmVal << "\n"); in foldImmediate() 607 ImmVal = DefMI.getOperand(2).getImm() + DefMI.getOperand(3).getImm(); in foldImmediate() 608 LLVM_DEBUG(dbgs() << "ImmVal is " << ImmVal << "\n"); in foldImmediate() 713 if (isInt<7>(ImmVal)) { in foldImmediate() 717 } else if (isMImmVal(ImmVal)) { in foldImmediate() 720 ImmVal = val2MImm(ImmVal); in foldImmediate() 727 if (!isInt<7>(ImmVal)) in foldImmediate() 734 if (!isMImmVal(ImmVal)) in foldImmediate() [all …]
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/freebsd/contrib/llvm-project/llvm/lib/Target/Hexagon/ |
H A D | HexagonConstExtenders.cpp | 345 int64_t ImmVal; // MO_Immediate, MO_TargetIndex, member 353 return Kind == ER.Kind && V.ImmVal == ER.V.ImmVal; in operator ==() 513 OS << "imm:" << ER.V.ImmVal; in operator <<() 528 OS << "tgi:" << ER.V.ImmVal; in operator <<() 531 OS << "cpi:" << ER.V.ImmVal; in operator <<() 534 OS << "jti:" << ER.V.ImmVal; in operator <<() 537 OS << "???:" << ER.V.ImmVal; in operator <<() 699 V.ImmVal = 0; in ExtRoot() 711 V.ImmVal = Op.getIndex(); in ExtRoot() 727 return V.ImmVal < ER.V.ImmVal; in operator <() [all …]
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H A D | HexagonHardwareLoops.cpp | 329 unsigned ImmVal; member 339 Contents.ImmVal = v; in CountValue() 358 return Contents.ImmVal; in getImm() 363 if (isImm()) { OS << Contents.ImmVal; } in print()
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/freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/Disassembler/ |
H A D | AArch64Disassembler.cpp | 445 uint64_t ImmVal = Imm; in DecodePCRelLabel16() local 446 if (ImmVal > (1 << 16)) in DecodePCRelLabel16() 448 ImmVal = -ImmVal; in DecodePCRelLabel16() 449 if (!Decoder->tryAddingSymbolicOperand(Inst, (ImmVal << 2), Addr, in DecodePCRelLabel16() 451 Inst.addOperand(MCOperand::createImm(ImmVal)); in DecodePCRelLabel16() 458 int64_t ImmVal = Imm; in DecodePCRelLabel19() local 461 if (ImmVal & (1 << (19 - 1))) in DecodePCRelLabel19() 462 ImmVal |= ~((1LL << 19) - 1); in DecodePCRelLabel19() 465 Inst, ImmVal * 4, Addr, Inst.getOpcode() != AArch64::LDRXl, 0, 0, 4)) in DecodePCRelLabel19() 466 Inst.addOperand(MCOperand::createImm(ImmVal)); in DecodePCRelLabel19() [all …]
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/freebsd/contrib/llvm-project/llvm/include/llvm/CodeGen/ |
H A D | MachineOperand.h | 173 int64_t ImmVal; // For MO_Immediate. member 558 return Contents.ImmVal; in getImm() 686 Contents.ImmVal = immVal; in setImm() 771 void ChangeToImmediate(int64_t ImmVal, unsigned TargetFlags = 0);
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/freebsd/contrib/llvm-project/llvm/include/llvm/MCA/ |
H A D | Instruction.h | 53 int64_t ImmVal; member 81 return ImmVal; in getImm() 108 Op.ImmVal = Val; in createImm()
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/freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/AsmParser/ |
H A D | AArch64AsmParser.cpp | 168 bool parseSymbolicImmVal(const MCExpr *&ImmVal); 3063 const MCExpr *ImmVal; in tryParseRPRFMOperand() local 3064 if (getParser().parseExpression(ImmVal)) in tryParseRPRFMOperand() 3067 const MCConstantExpr *MCE = dyn_cast<MCConstantExpr>(ImmVal); in tryParseRPRFMOperand() 3123 const MCExpr *ImmVal; in tryParsePrefetch() local 3124 if (getParser().parseExpression(ImmVal)) in tryParsePrefetch() 3127 const MCConstantExpr *MCE = dyn_cast<MCConstantExpr>(ImmVal); in tryParsePrefetch() 3636 const MCExpr *ImmVal; in tryParseOptionalShiftExtend() local 3637 if (getParser().parseExpression(ImmVal)) in tryParseOptionalShiftExtend() 3640 const MCConstantExpr *MCE = dyn_cast<MCConstantExpr>(ImmVal); in tryParseOptionalShiftExtend() [all …]
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/freebsd/contrib/llvm-project/llvm/lib/CodeGen/ |
H A D | ImplicitNullChecks.cpp | 418 int64_t ImmVal; in isSuitableMemoryOp() local 419 if (!TII->getConstValDefinedInReg(*ModifyingMI, RegUsedInAddr, ImmVal)) in isSuitableMemoryOp() 424 APInt ImmValC(RegSizeInBits, ImmVal, true /*IsSigned*/); in isSuitableMemoryOp() 429 // Sign of the product depends on the sign of the ImmVal, since Multiplier in isSuitableMemoryOp()
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H A D | MachineOperand.cpp | 162 void MachineOperand::ChangeToImmediate(int64_t ImmVal, unsigned TargetFlags) { in ChangeToImmediate() argument 168 Contents.ImmVal = ImmVal; in ChangeToImmediate()
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/freebsd/contrib/llvm-project/llvm/lib/Target/PowerPC/AsmParser/ |
H A D | PPCAsmParser.cpp | 1897 int64_t ImmVal; in validateTargetOperandClass() local 1899 case MCK_0: ImmVal = 0; break; in validateTargetOperandClass() 1900 case MCK_1: ImmVal = 1; break; in validateTargetOperandClass() 1901 case MCK_2: ImmVal = 2; break; in validateTargetOperandClass() 1902 case MCK_3: ImmVal = 3; break; in validateTargetOperandClass() 1903 case MCK_4: ImmVal = 4; break; in validateTargetOperandClass() 1904 case MCK_5: ImmVal = 5; break; in validateTargetOperandClass() 1905 case MCK_6: ImmVal = 6; break; in validateTargetOperandClass() 1906 case MCK_7: ImmVal = 7; break; in validateTargetOperandClass() 1911 if (Op.isU3Imm() && Op.getImm() == ImmVal) in validateTargetOperandClass()
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/freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/ |
H A D | AArch64ISelDAGToDAG.cpp | 4259 int64_t ImmVal = CNode->getSExtValue(); in SelectSVESignedArithImm() local 4261 if (ImmVal >= -128 && ImmVal < 128) { in SelectSVESignedArithImm() 4262 Imm = CurDAG->getTargetConstant(ImmVal, DL, MVT::i32); in SelectSVESignedArithImm() 4271 uint64_t ImmVal = CNode->getZExtValue(); in SelectSVEArithImm() local 4275 ImmVal &= 0xFF; in SelectSVEArithImm() 4278 ImmVal &= 0xFFFF; in SelectSVEArithImm() 4281 ImmVal &= 0xFFFFFFFF; in SelectSVEArithImm() 4289 if (ImmVal < 256) { in SelectSVEArithImm() 4290 Imm = CurDAG->getTargetConstant(ImmVal, SDLoc(N), MVT::i32); in SelectSVEArithImm() 4300 uint64_t ImmVal = CNode->getZExtValue(); in SelectSVELogicalImm() local [all …]
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/freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/MCTargetDesc/ |
H A D | AArch64MCCodeEmitter.cpp | 238 uint32_t ImmVal = 0; in getLdStUImm12OpValue() 241 ImmVal = static_cast<uint32_t>(MO.getImm()); in getLdStUImm12OpValue() 249 return ImmVal; in getAdrLabelOpValue() 232 uint32_t ImmVal = 0; getLdStUImm12OpValue() local
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/freebsd/contrib/llvm-project/llvm/lib/Target/Sparc/AsmParser/ |
H A D | SparcAsmParser.cpp | 1110 int64_t ImmVal = 0; in parseMembarTag() local 1114 if (!Mask->isImm() || !Mask->getImm()->evaluateAsAbsolute(ImmVal) || in parseMembarTag() 1115 ImmVal < 0 || ImmVal > 127) in parseMembarTag() 1137 ImmVal |= MaskVal; in parseMembarTag() 1143 EVal = MCConstantExpr::create(ImmVal, getContext()); in parseMembarTag()
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/freebsd/contrib/llvm-project/llvm/lib/Target/SystemZ/ |
H A D | SystemZInstrInfo.cpp | 658 int64_t ImmVal = DefMI.getOperand(1).getImm(); in foldImmediate() local 659 if (ImmVal != 0) // TODO: Handle other values in foldImmediate() 681 loadImmediate(MBB, UseMI.getIterator(), TmpReg, ImmVal); in foldImmediate() 703 int32_t ImmVal = (int32_t)DefMI.getOperand(1).getImm(); in foldImmediate() local 751 UseMI.getOperand(UseIdx).ChangeToImmediate(ImmVal); in foldImmediate() 2298 int64_t &ImmVal) const { in getConstValDefinedInReg() 2301 ImmVal = MI.getOperand(1).getImm(); in getConstValDefinedInReg() 2303 return ImmVal == 0; in getConstValDefinedInReg()
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H A D | SystemZInstrInfo.h | 388 int64_t &ImmVal) const override;
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/freebsd/contrib/llvm-project/llvm/lib/Target/ARM/ |
H A D | ARMBaseInstrInfo.cpp | 3348 uint32_t ImmVal = (uint32_t)DefMI.getOperand(1).getImm(); in foldImmediate() local 3371 if (ARM_AM::isSOImmTwoPartVal(ImmVal)) in foldImmediate() 3373 else if (ARM_AM::isSOImmTwoPartVal(-ImmVal)) { in foldImmediate() 3374 ImmVal = -ImmVal; in foldImmediate() 3378 SOImmValV1 = (uint32_t)ARM_AM::getSOImmTwoPartFirst(ImmVal); in foldImmediate() 3379 SOImmValV2 = (uint32_t)ARM_AM::getSOImmTwoPartSecond(ImmVal); in foldImmediate() 3383 if (!ARM_AM::isSOImmTwoPartVal(ImmVal)) in foldImmediate() 3385 SOImmValV1 = (uint32_t)ARM_AM::getSOImmTwoPartFirst(ImmVal); in foldImmediate() 3386 SOImmValV2 = (uint32_t)ARM_AM::getSOImmTwoPartSecond(ImmVal); in foldImmediate() 3403 if (ARM_AM::isT2SOImmTwoPartVal(ImmVal)) in foldImmediate() [all …]
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/freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/AsmParser/ |
H A D | AMDGPUAsmParser.cpp | 2059 uint32_t ImmVal = FPLiteral.bitcastToAPInt().getZExtValue(); in isInlinableImm() local 2060 return isInlineableLiteralOp16(ImmVal, type, in isInlinableImm() 2327 uint64_t ImmVal = FPLiteral.bitcastToAPInt().getZExtValue(); in addLiteralImmOperand() local 2328 Inst.addOperand(MCOperand::createImm(ImmVal)); in addLiteralImmOperand() 6745 int64_t ImmVal = 0; in tryParseIndexKey() local 6747 auto Res = parseIntWithPrefix(Pref, ImmVal); in tryParseIndexKey() 6751 if (ImmTy == AMDGPUOperand::ImmTyIndexKey16bit && (ImmVal < 0 || ImmVal > 1)) in tryParseIndexKey() 6754 if (ImmTy == AMDGPUOperand::ImmTyIndexKey8bit && (ImmVal < 0 || ImmVal > 3)) in tryParseIndexKey() 6757 Operands.push_back(AMDGPUOperand::CreateImm(this, ImmVal, Loc, ImmTy)); in tryParseIndexKey() 7389 int64_t ImmVal = 0; in parseHwreg() local [all …]
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/freebsd/contrib/llvm-project/llvm/lib/Target/AVR/ |
H A D | AVRExpandPseudoInsts.cpp | 72 bool isLogicImmOpRedundant(unsigned Op, unsigned ImmVal) const; 73 bool isLogicRegOpUndef(unsigned Op, unsigned ImmVal) const; 219 unsigned ImmVal) const { in isLogicImmOpRedundant() 222 if (Op == AVR::ANDIRdK && ImmVal == 0xff) in isLogicImmOpRedundant() 226 if (Op == AVR::ORIRdK && ImmVal == 0x0) in isLogicImmOpRedundant() 232 bool AVRExpandPseudo::isLogicRegOpUndef(unsigned Op, unsigned ImmVal) const { in isLogicRegOpUndef() 234 if (Op == AVR::ANDIRdK && ImmVal == 0x00) in isLogicRegOpUndef() 238 if (Op == AVR::ORIRdK && ImmVal == 0xff) in isLogicRegOpUndef()
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/freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/GISel/ |
H A D | AArch64InstructionSelector.cpp | 1904 std::optional<int64_t> ImmVal = getVectorSHLImm(Ty, Src2Reg, MRI); in selectVectorSHL() local 1908 Opc = ImmVal ? AArch64::SHLv2i64_shift : AArch64::USHLv2i64; in selectVectorSHL() 1910 Opc = ImmVal ? AArch64::SHLv4i32_shift : AArch64::USHLv4i32; in selectVectorSHL() 1912 Opc = ImmVal ? AArch64::SHLv2i32_shift : AArch64::USHLv2i32; in selectVectorSHL() 1914 Opc = ImmVal ? AArch64::SHLv4i16_shift : AArch64::USHLv4i16; in selectVectorSHL() 1916 Opc = ImmVal ? AArch64::SHLv8i16_shift : AArch64::USHLv8i16; in selectVectorSHL() 1918 Opc = ImmVal ? AArch64::SHLv16i8_shift : AArch64::USHLv16i8; in selectVectorSHL() 1920 Opc = ImmVal ? AArch64::SHLv8i8_shift : AArch64::USHLv8i8; in selectVectorSHL() 1927 if (ImmVal) in selectVectorSHL() 1928 Shl.addImm(*ImmVal); in selectVectorSHL() [all …]
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