/freebsd/contrib/llvm-project/llvm/utils/TableGen/Common/GlobalISel/ |
H A D | PatternParser.cpp | 222 auto ImmTy = PatternType::get(DiagLoc, TyDef, in parseInstructionPatternOperand() local 225 if (!ImmTy) in parseInstructionPatternOperand() 239 IP.addOperand(Val->getValue(), insertStrRef(Name), *ImmTy); in parseInstructionPatternOperand()
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/freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/AsmParser/ |
H A D | AMDGPUAsmParser.cpp | 112 enum ImmTy { enum in __anon6862249c0111::AMDGPUOperand 198 ImmTy Type; 364 bool isImmTy(ImmTy ImmT) const { in isImmTy() 368 template <ImmTy Ty> bool isImmTy() const { return isImmTy(Ty); } in isImmTy() 966 ImmTy getImmTy() const { in getImmTy() 1065 static void printImmTy(raw_ostream& OS, ImmTy Type) { in printImmTy() 1156 ImmTy Type = ImmTyNone, in CreateImm() 1396 using OptionalImmIndexMap = std::map<AMDGPUOperand::ImmTy, unsigned>; 1604 AMDGPUOperand::ImmTy ImmTy = AMDGPUOperand::ImmTyNone, 1609 AMDGPUOperand::ImmTy ImmTy = AMDGPUOperand::ImmTyNone, [all …]
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/freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
H A D | AMDGPUInstructions.td | 118 string ImmTy = "ImmTy"#name; 124 "AMDGPUOperand::"#ImmTy#"); }"; 138 let ImmTy = "ImmTyNone"; 151 let ImmTy = op.ImmTy;
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H A D | SIInstrInfo.td | 1023 "return Op.isImmTy(AMDGPUOperand::"#ImmTy#"); })"; 1029 "AMDGPUOperand::"#ImmTy#", "#ConvertMethod#"); }"; 1034 let PredicateMethod = "isImmTy<AMDGPUOperand::"#ImmTy#">"; 1037 "return parseNamedBit(\""#Id#"\", Operands, AMDGPUOperand::"#ImmTy#"); }"; 1054 "return parseSDWASel(Operands, \""#Id#"\", AMDGPUOperand::"#ImmTy#"); }"; 1063 "AMDGPUOperand::"#ImmTy#"); }"; 1066 let ImmTy = "ImmTyOffset" in
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H A D | SMInstructions.td | 16 let ImmTy = SMEMOffsetMod.ImmTy;
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/freebsd/contrib/llvm-project/llvm/lib/Target/NVPTX/ |
H A D | NVPTXIntrinsics.td | 2046 SDNode Imm, ValueType ImmTy, 2061 // immediates via explicit cast to ImmTy. 2064 (Intr (i16 Int16Regs:$src), (ImmTy Imm:$b))>; 2067 (Intr (i32 Int32Regs:$src), (ImmTy Imm:$b))>; 2070 (Intr (i64 Int64Regs:$src), (ImmTy Imm:$b))>; 2075 Operand ImmType, SDNode Imm, ValueType ImmTy, 2089 (Intr (i32 Int32Regs:$src), (ImmTy Imm:$b), (regT regclass:$c))>; 2092 (Intr (i64 Int64Regs:$src), (ImmTy Imm:$b), (regT regclass:$c))>; 2095 (Intr (i32 Int32Regs:$src), (regT regclass:$b), (ImmTy Imm:$c))>; 2098 (Intr (i64 Int64Regs:$src), (regT regclass:$b), (ImmTy Imm:$c))>; [all …]
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/freebsd/contrib/llvm-project/llvm/utils/TableGen/ |
H A D | GlobalISelCombinerEmitter.cpp | 2046 auto ImmTy = getLLTCodeGenOrTempType(Ty, M); in emitCodeGenInstructionApplyImmOperand() local 2049 DstMI.addRenderer<ImmRenderer>(O.getImmValue(), ImmTy); in emitCodeGenInstructionApplyImmOperand() 2056 ImmTy, TempRegID); in emitCodeGenInstructionApplyImmOperand()
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/freebsd/contrib/llvm-project/llvm/lib/CodeGen/AsmPrinter/ |
H A D | AsmPrinter.cpp | 1180 Type *ImmTy = Op.getFPImm()->getType(); in emitDebugValueComment() local 1181 if (ImmTy->isBFloatTy() || ImmTy->isHalfTy() || ImmTy->isFloatTy() || in emitDebugValueComment() 1182 ImmTy->isDoubleTy()) { in emitDebugValueComment()
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/freebsd/contrib/llvm-project/llvm/lib/Target/ARM/ |
H A D | ARMInstrNEON.td | 3221 Format f, InstrItinClass itin, Operand ImmTy, 3224 (outs DPR:$Vd), (ins DPR:$Vm, ImmTy:$SIMM), f, itin, 3228 Format f, InstrItinClass itin, Operand ImmTy, 3231 (outs QPR:$Vd), (ins QPR:$Vm, ImmTy:$SIMM), f, itin, 3239 ValueType ResTy, ValueType OpTy, Operand ImmTy, 3242 (outs QPR:$Vd), (ins DPR:$Vm, ImmTy:$SIMM), N2RegVShLFrm, 3244 [(set QPR:$Vd, (ResTy (OpNode (OpTy DPR:$Vm), ImmTy:$SIMM)))]>; 3249 ValueType ResTy, ValueType OpTy, Operand ImmTy, 3252 (outs DPR:$Vd), (ins QPR:$Vm, ImmTy:$SIMM), N2RegVShRFrm, itin, 3255 (i32 ImmTy:$SIMM))))]>; [all …]
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/freebsd/contrib/llvm-project/llvm/lib/Target/Hexagon/AsmParser/ |
H A D | HexagonAsmParser.cpp | 211 struct ImmTy { struct 218 struct ImmTy Imm;
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/freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/ |
H A D | AArch64SVEInstrInfo.td | 1282 …s sve_masked_gather_x2_unscaled<ValueType Ty, SDPatternOperator Load, string Inst, Operand ImmTy> { 1284 def : Pat<(Ty (Load (SVEDup0Undef), nxv2i1:$gp, (i64 ImmTy:$imm), nxv2i64:$ptrs)), 1285 (!cast<Instruction>(Inst # _IMM) PPR:$gp, ZPR:$ptrs, ImmTy:$imm)>; 1516 …sve_masked_scatter_x2_unscaled<ValueType Ty, SDPatternOperator Store, string Inst, Operand ImmTy> { 1518 def : Pat<(Store Ty:$data, nxv2i1:$gp, (i64 ImmTy:$imm), nxv2i64:$ptrs), 1519 (!cast<Instruction>(Inst # _IMM) ZPR:$data, PPR:$gp, ZPR:$ptrs, ImmTy:$imm)>;
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H A D | SVEInstrFormats.td | 510 ValueType vt2, Operand ImmTy, Instruction inst> 511 : Pat<(vtd (op vt1:$Op1, (vt2 ImmTy:$Op2))), 512 (inst $Op1, ImmTy:$Op2)>; 527 ValueType vt2, ValueType vt3, Operand ImmTy, 529 : Pat<(vtd (op vt1:$Op1, vt2:$Op2, (vt3 ImmTy:$Op3))), 530 (inst $Op1, $Op2, ImmTy:$Op3)>; 534 Operand ImmTy, Instruction inst> 535 : Pat<(vtd (op vt1:$Op1, vt2:$Op2, vt3:$Op3, (vt4 ImmTy:$Op4))), 536 (inst $Op1, $Op2, $Op3, ImmTy:$Op4)>;
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/freebsd/contrib/llvm-project/llvm/lib/CodeGen/GlobalISel/ |
H A D | CombinerHelper.cpp | 1845 LLT ImmTy = MRI.getType(MI.getOperand(2).getReg()); in applyShiftImmedChain() local 1846 Register NewImm = Builder.buildConstant(ImmTy, Imm).getReg(0); in applyShiftImmedChain()
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