| /freebsd/contrib/llvm-project/llvm/lib/Target/PowerPC/ |
| H A D | PPCFastISel.cpp | 2203 Register ImmReg = createResultReg(&PPC::CRBITRCRegClass); in PPCMaterializeInt() local
2205 TII.get(CI->isZero() ? PPC::CRUNSET : PPC::CRSET), ImmReg); in PPCMaterializeInt()
2206 return ImmReg; in PPCMaterializeInt()
2223 Register ImmReg = createResultReg(RC); in PPCMaterializeInt() local
2224 BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, MIMD, TII.get(Opc), ImmReg) in PPCMaterializeInt()
2226 return ImmReg; in PPCMaterializeInt()
2388 Register ImmReg = createResultReg(&PPC::CRBITRCRegClass); in fastEmit_i() local
2390 TII.get(Imm == 0 ? PPC::CRUNSET : PPC::CRSET), ImmReg); in fastEmit_i()
2391 return ImmReg; in fastEmit_i()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
| H A D | R600ISelLowering.cpp | 2030 unsigned ImmReg = R600::ALU_LITERAL_X; in FoldOperand() local
2037 ImmReg = R600::ZERO; in FoldOperand()
2039 ImmReg = R600::HALF; in FoldOperand()
2041 ImmReg = R600::ONE; in FoldOperand()
2048 ImmReg = R600::ZERO; in FoldOperand()
2050 ImmReg = R600::ONE_INT; in FoldOperand()
2059 if (ImmReg == R600::ALU_LITERAL_X) { in FoldOperand()
2067 Src = DAG.getRegister(ImmReg, MVT::i32); in FoldOperand()
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| H A D | SILoadStoreOptimizer.cpp | 1353 Register ImmReg = MRI->createVirtualRegister(&AMDGPU::SReg_32RegClass); in mergeRead2Pair() local
1354 BuildMI(*MBB, InsertBefore, DL, TII->get(AMDGPU::S_MOV_B32), ImmReg) in mergeRead2Pair()
1361 .addReg(ImmReg) in mergeRead2Pair()
1435 Register ImmReg = MRI->createVirtualRegister(&AMDGPU::SReg_32RegClass); in mergeWrite2Pair() local
1436 BuildMI(*MBB, InsertBefore, DL, TII->get(AMDGPU::S_MOV_B32), ImmReg) in mergeWrite2Pair()
1443 .addReg(ImmReg) in mergeWrite2Pair()
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| H A D | SIInstrInfo.cpp | 8804 Register ImmReg = MRI.createVirtualRegister(&AMDGPU::VGPR_32RegClass); in movePackToVALU() local
8809 BuildMI(*MBB, Inst, DL, get(AMDGPU::V_MOV_B32_e32), ImmReg) in movePackToVALU()
8813 .addReg(ImmReg, RegState::Kill) in movePackToVALU()
8823 Register ImmReg = MRI.createVirtualRegister(&AMDGPU::VGPR_32RegClass); in movePackToVALU() local
8824 BuildMI(*MBB, Inst, DL, get(AMDGPU::V_MOV_B32_e32), ImmReg) in movePackToVALU()
8827 .addReg(ImmReg, RegState::Kill) in movePackToVALU()
8844 Register ImmReg = MRI.createVirtualRegister(&AMDGPU::VGPR_32RegClass); in movePackToVALU() local
8849 BuildMI(*MBB, Inst, DL, get(AMDGPU::V_MOV_B32_e32), ImmReg) in movePackToVALU()
8853 .addReg(ImmReg, RegState::Kill) in movePackToVALU()
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| H A D | AMDGPUInstructionSelector.cpp | 2499 Register ImmReg = MRI->createVirtualRegister(DstRC); in selectG_TRUNC() local
2515 BuildMI(*MBB, I, DL, TII.get(MovOpc), ImmReg) in selectG_TRUNC()
2519 .addReg(ImmReg); in selectG_TRUNC()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/ARM/ |
| H A D | ARMFastISel.cpp | 491 Register ImmReg = createResultReg(RC); in ARMMaterializeInt() local
493 TII.get(Opc), ImmReg) in ARMMaterializeInt()
495 return ImmReg; in ARMMaterializeInt()
507 Register ImmReg = createResultReg(RC); in ARMMaterializeInt() local
509 TII.get(Opc), ImmReg) in ARMMaterializeInt()
511 return ImmReg; in ARMMaterializeInt()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/Mips/AsmParser/ |
| H A D | MipsAsmParser.cpp | 4614 MCRegister ImmReg = DstReg; in expandSgeImm() local
4619 ImmReg = ATReg; in expandSgeImm()
4622 if (loadImmediate(ImmValue, ImmReg, MCRegister(), isInt<32>(ImmValue), in expandSgeImm()
4626 TOut.emitRRR(OpRegCode, DstReg, SrcReg, ImmReg, IDLoc, STI); in expandSgeImm()
4644 MCRegister ImmReg = DstReg; in expandSgtImm() local
4667 ImmReg = ATReg; in expandSgtImm()
4670 if (loadImmediate(ImmValue, ImmReg, MCRegister(), isInt<32>(ImmValue), false, in expandSgtImm()
4675 TOut.emitRRR(OpCode, DstReg, ImmReg, SrcReg, IDLoc, STI); in expandSgtImm()
4744 MCRegister ImmReg = DstReg; in expandSleImm() local
4749 ImmReg = ATReg; in expandSleImm()
[all …]
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| /freebsd/contrib/llvm-project/llvm/lib/Target/Hexagon/ |
| H A D | HexagonBitSimplify.cpp | 1494 Register ImmReg = genTfrConst(MRI.getRegClass(DR), C, B, At, DL); in processBlock() local
1495 if (ImmReg) { in processBlock()
1496 HBS::replaceReg(DR, ImmReg, MRI); in processBlock()
1497 BT.put(ImmReg, DRC); in processBlock()
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