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Searched refs:ImmOpnd (Results 1 – 17 of 17) sorted by relevance

/freebsd/contrib/llvm-project/llvm/lib/Target/Mips/
H A DMipsAnalyzeImmediate.cpp18 MipsAnalyzeImmediate::Inst::Inst(unsigned O, unsigned I) : Opc(O), ImmOpnd(I) {} in Inst()
93 (Seq[1].Opc != SLL) || (Seq[1].ImmOpnd < 16)) in ReplaceADDiuSLLWithLUi()
97 int64_t Imm = SignExtend64<16>(Seq[0].ImmOpnd); in ReplaceADDiuSLLWithLUi()
98 int64_t ShiftedImm = (uint64_t)Imm << (Seq[1].ImmOpnd - 16); in ReplaceADDiuSLLWithLUi()
105 Seq[0].ImmOpnd = (unsigned)(ShiftedImm & 0xffff); in ReplaceADDiuSLLWithLUi()
H A DMipsAnalyzeImmediate.h20 unsigned Opc, ImmOpnd; member
22 Inst(unsigned Opc, unsigned ImmOpnd);
H A DMipsSEISelDAGToDAG.cpp819 SDValue ImmOpnd = CurDAG->getTargetConstant(SignExtend64<16>(Inst->ImmOpnd), in trySelect() local
826 RegOpnd = CurDAG->getMachineNode(Inst->Opc, DL, MVT::i64, ImmOpnd); in trySelect()
831 ImmOpnd); in trySelect()
835 ImmOpnd = CurDAG->getTargetConstant(SignExtend64<16>(Inst->ImmOpnd), DL, in trySelect()
838 SDValue(RegOpnd, 0), ImmOpnd); in trySelect()
H A DMipsSEInstrInfo.cpp613 BuildMI(MBB, II, DL, get(LUi), Reg).addImm(SignExtend64<16>(Inst->ImmOpnd)); in loadImmediate()
616 .addImm(SignExtend64<16>(Inst->ImmOpnd)); in loadImmediate()
621 .addImm(SignExtend64<16>(Inst->ImmOpnd)); in loadImmediate()
624 *NewImm = Inst->ImmOpnd; in loadImmediate()
H A DMips32r6InstrInfo.td318 Operand ImmOpnd, InstrItinClass itin>
321 dag InOperandList = (ins ImmOpnd:$imm);
332 Operand ImmOpnd, InstrItinClass itin>
335 dag InOperandList = (ins GPROpnd:$rs, GPROpnd:$rt, ImmOpnd:$bp);
760 Operand ImmOpnd, InstrItinClass itin>
763 dag InOperandList = (ins GPROpnd:$rs, GPROpnd:$rt, ImmOpnd:$imm2);
H A DMicroMips32r6InstrInfo.td516 Operand ImmOpnd, InstrItinClass Itin>
519 dag InOperandList = (ins GPROpnd:$rs, GPROpnd:$rt, ImmOpnd:$bp);
552 Operand ImmOpnd, InstrItinClass Itin>
555 dag InOperandList = (ins GPROpnd:$rs, GPROpnd:$rt, ImmOpnd:$imm2);
564 Operand ImmOpnd, InstrItinClass Itin>
567 dag InOperandList = (ins ImmOpnd:$imm);
H A DMicroMipsDSPInstrInfo.td217 RegisterOperand RO, Operand ImmOpnd> {
219 dag InOperandList = (ins RO:$rs, ImmOpnd:$sa);
H A DMipsDSPInstrInfo.td356 RegisterOperand RO, Operand ImmOpnd> {
358 dag InOperandList = (ins RO:$rt, ImmOpnd:$rs_sa);
H A DMicroMipsInstrInfo.td334 class ShiftIMM16<string opstr, Operand ImmOpnd, RegisterOperand RO,
336 MicroMipsInst16<(outs RO:$rd), (ins RO:$rt, ImmOpnd:$shamt),
H A DMipsInstrInfo.td1360 class shift_rotate_imm<string opstr, Operand ImmOpnd,
1364 InstSE<(outs RO:$rd), (ins RO:$rt, ImmOpnd:$shamt),
/freebsd/contrib/llvm-project/llvm/lib/Target/LoongArch/
H A DLoongArchLASXInstrInfo.td50 class LASX1RI13_XI<bits<32> op, Operand ImmOpnd = simm13>
51 : Fmt1RI13_XI<op, (outs LASX256:$xd), (ins ImmOpnd:$imm13), "$xd, $imm13">;
62 class LASX2RI1_XXI<bits<32> op, Operand ImmOpnd = uimm1>
63 : Fmt2RI1_XXI<op, (outs LASX256:$xd), (ins LASX256:$xj, ImmOpnd:$imm1),
66 class LASX2RI2_XXI<bits<32> op, Operand ImmOpnd = uimm2>
67 : Fmt2RI2_XXI<op, (outs LASX256:$xd), (ins LASX256:$xj, ImmOpnd:$imm2),
70 class LASX2RI2_RXI<bits<32> op, Operand ImmOpnd = uimm2>
71 : Fmt2RI2_RXI<op, (outs GPR:$rd), (ins LASX256:$xj, ImmOpnd:$imm2),
74 class LASX2RI3_XXI<bits<32> op, Operand ImmOpnd = uimm3>
75 : Fmt2RI3_XXI<op, (outs LASX256:$xd), (ins LASX256:$xj, ImmOpnd:$imm3),
[all …]
H A DLoongArchLSXInstrInfo.td208 class LSX1RI13_VI<bits<32> op, Operand ImmOpnd = simm13>
209 : Fmt1RI13_VI<op, (outs LSX128:$vd), (ins ImmOpnd:$imm13), "$vd, $imm13">;
220 class LSX2RI1_VVI<bits<32> op, Operand ImmOpnd = uimm1>
221 : Fmt2RI1_VVI<op, (outs LSX128:$vd), (ins LSX128:$vj, ImmOpnd:$imm1),
224 class LSX2RI1_RVI<bits<32> op, Operand ImmOpnd = uimm1>
225 : Fmt2RI1_RVI<op, (outs GPR:$rd), (ins LSX128:$vj, ImmOpnd:$imm1),
228 class LSX2RI2_VVI<bits<32> op, Operand ImmOpnd = uimm2>
229 : Fmt2RI2_VVI<op, (outs LSX128:$vd), (ins LSX128:$vj, ImmOpnd:$imm2),
232 class LSX2RI2_RVI<bits<32> op, Operand ImmOpnd = uimm2>
233 : Fmt2RI2_RVI<op, (outs GPR:$rd), (ins LSX128:$vj, ImmOpnd:$imm2),
[all …]
H A DLoongArchInstrInfo.td639 class ALU_3RI2<bits<32> op, Operand ImmOpnd>
640 : Fmt3RI2<op, (outs GPR:$rd), (ins GPR:$rj, GPR:$rk, ImmOpnd:$imm2),
642 class ALU_3RI3<bits<32> op, Operand ImmOpnd>
643 : Fmt3RI3<op, (outs GPR:$rd), (ins GPR:$rj, GPR:$rk, ImmOpnd:$imm3),
645 class ALU_2RI5<bits<32> op, Operand ImmOpnd>
646 : Fmt2RI5<op, (outs GPR:$rd), (ins GPR:$rj, ImmOpnd:$imm5),
648 class ALU_2RI6<bits<32> op, Operand ImmOpnd>
649 : Fmt2RI6<op, (outs GPR:$rd), (ins GPR:$rj, ImmOpnd:$imm6),
651 class ALU_2RI12<bits<32> op, Operand ImmOpnd>
652 : Fmt2RI12<op, (outs GPR:$rd), (ins GPR:$rj, ImmOpnd:$imm12),
[all …]
/freebsd/contrib/llvm-project/llvm/lib/Target/PowerPC/
H A DPPCISelDAGToDAG.cpp7798 SDValue ImmOpnd = Base.getOperand(1); in PeepholePPC64() local
7805 if (GlobalAddressSDNode *GA = dyn_cast<GlobalAddressSDNode>(ImmOpnd)) { in PeepholePPC64()
7831 if (HImmOpnd != ImmOpnd) in PeepholePPC64()
7841 dyn_cast<GlobalAddressSDNode>(ImmOpnd)) { in PeepholePPC64()
7854 if (auto *C = dyn_cast<ConstantSDNode>(ImmOpnd)) { in PeepholePPC64()
7863 ImmOpnd = CurDAG->getTargetConstant(Offset, SDLoc(ImmOpnd), in PeepholePPC64()
7864 ImmOpnd.getValueType()); in PeepholePPC64()
7872 GlobalAddressSDNode *GA = dyn_cast<GlobalAddressSDNode>(ImmOpnd); in PeepholePPC64()
7875 ImmOpnd = CurDAG->getTargetGlobalAddress(GA->getGlobal(), SDLoc(GA), in PeepholePPC64()
7896 if (GlobalAddressSDNode *GA = dyn_cast<GlobalAddressSDNode>(ImmOpnd)) { in PeepholePPC64()
[all …]
/freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/
H A DAArch64FrameLowering.cpp1372 MachineOperand *ImmOpnd = nullptr; in fixupSEHOpcode() local
1384 ImmOpnd = &MBBI->getOperand(ImmIdx); in fixupSEHOpcode()
1387 if (ImmOpnd) in fixupSEHOpcode()
1388 ImmOpnd->setImm(ImmOpnd->getImm() + LocalStackSize); in fixupSEHOpcode()
H A DAArch64InstrInfo.cpp5719 const MachineOperand &ImmOpnd = in isAArch64FrameOffsetLegal() local
5721 Offset += ImmOpnd.getImm() * Scale; in isAArch64FrameOffsetLegal()
/freebsd/contrib/llvm-project/llvm/lib/Target/RISCV/
H A DRISCVInstrInfoC.td281 Operand ImmOpnd>
282 : RVInst16CB<0b100, 0b01, (outs cls:$rs1_wb), (ins cls:$rs1, ImmOpnd:$imm),