| /freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
| H A D | AMDGPUISelDAGToDAG.h | 136 bool IsBuffer, int64_t ImmOffset = 0) const;
152 SDValue &ImmOffset) const;
173 uint64_t ImmOffset) const;
180 int64_t ImmOffset = 0) const;
185 int64_t ImmOffset = 0) const;
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| H A D | AMDGPUISelDAGToDAG.cpp | 1470 SDValue &ImmOffset) const { in SelectMUBUFScratchOffen()
1492 ImmOffset = CurDAG->getTargetConstant(Imm & MaxOffset, DL, MVT::i32); in SelectMUBUFScratchOffen()
1523 ImmOffset = CurDAG->getTargetConstant(C1, DL, MVT::i32); in SelectMUBUFScratchOffen()
1530 ImmOffset = CurDAG->getTargetConstant(0, DL, MVT::i32); in SelectMUBUFScratchOffen()
1767 int64_t ImmOffset = 0; in SelectGlobalSAddr() local
1780 ImmOffset = COffsetVal; in SelectGlobalSAddr()
1837 Offset = CurDAG->getTargetConstant(ImmOffset, SDLoc(), MVT::i32); in SelectGlobalSAddr()
1853 Offset = CurDAG->getTargetConstant(ImmOffset, SDLoc(), MVT::i32); in SelectGlobalSAddr()
1921 SDValue VAddr, SDValue SAddr, uint64_t ImmOffset) const { in checkFlatScratchSVSSwizzleBug()
1932 KnownBits::makeConstant(APInt(32, ImmOffset))); in checkFlatScratchSVSSwizzleBug()
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| H A D | AMDGPUInstructionSelector.h | 248 uint64_t ImmOffset) const;
295 Register &SOffset, int64_t &ImmOffset) const;
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| H A D | AMDGPUInstructionSelector.cpp | 1653 unsigned ImmOffset; in selectDSGWSIntrinsic() local
1675 ImmOffset = OffsetDef->getOperand(1).getCImm()->getZExtValue(); in selectDSGWSIntrinsic()
1679 std::tie(BaseOffset, ImmOffset) = in selectDSGWSIntrinsic()
1719 MIB.addImm(ImmOffset) in selectDSGWSIntrinsic()
4365 int64_t ImmOffset = 0; in selectGlobalSAddr() local
4375 ImmOffset = ConstOffset; in selectGlobalSAddr()
4443 MIB.addImm(ImmOffset); in selectGlobalSAddr()
4467 [=](MachineInstrBuilder &MIB) { MIB.addImm(ImmOffset); } // offset in selectGlobalSAddr()
4476 int64_t ImmOffset = 0; in selectScratchSAddr() local
4486 ImmOffset = ConstOffset; in selectScratchSAddr()
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| H A D | AMDGPURegisterBankInfo.cpp | 1254 uint32_t SOffset, ImmOffset; in setBufferOffsets() local
1255 if (TII->splitMUBUFOffset(*Imm, SOffset, ImmOffset, Alignment)) { in setBufferOffsets()
1258 InstOffsetVal = ImmOffset; in setBufferOffsets()
1262 return SOffset + ImmOffset; in setBufferOffsets()
1272 uint32_t SOffset, ImmOffset; in setBufferOffsets() local
1274 TII->splitMUBUFOffset(Offset, SOffset, ImmOffset, Alignment)) { in setBufferOffsets()
1279 InstOffsetVal = ImmOffset; in setBufferOffsets()
1288 InstOffsetVal = ImmOffset; in setBufferOffsets()
1364 int64_t ImmOffset = 0; in applyMappingSBufferLoad() local
1367 SOffset, ImmOffset, Alignment); in applyMappingSBufferLoad()
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| H A D | AMDGPULegalizerInfo.cpp | 5672 unsigned ImmOffset; in splitBufferOffsets() local
5676 std::tie(BaseReg, ImmOffset) = in splitBufferOffsets()
5691 unsigned Overflow = ImmOffset & ~MaxImm; in splitBufferOffsets()
5692 ImmOffset -= Overflow; in splitBufferOffsets()
5694 Overflow += ImmOffset; in splitBufferOffsets()
5695 ImmOffset = 0; in splitBufferOffsets()
5710 return std::pair(BaseReg, ImmOffset); in splitBufferOffsets()
5822 unsigned ImmOffset; in legalizeBufferStore() local
5849 std::tie(VOffset, ImmOffset) = splitBufferOffsets(B, VOffset); in legalizeBufferStore()
5878 .addImm(ImmOffset); // offset(imm) in legalizeBufferStore()
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| H A D | SIInstrInfo.h | 1382 bool splitMUBUFOffset(uint32_t Imm, uint32_t &SOffset, uint32_t &ImmOffset,
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| H A D | SIISelLowering.cpp | 9975 unsigned ImmOffset = C1->getZExtValue(); in splitBufferOffsets() local
9984 unsigned Overflow = ImmOffset & ~MaxImm; in splitBufferOffsets()
9985 ImmOffset -= Overflow; in splitBufferOffsets()
9987 Overflow += ImmOffset; in splitBufferOffsets()
9988 ImmOffset = 0; in splitBufferOffsets()
9990 C1 = cast<ConstantSDNode>(DAG.getTargetConstant(ImmOffset, DL, MVT::i32)); in splitBufferOffsets()
10018 uint32_t SOffset, ImmOffset; in setBufferOffsets() local
10019 if (TII->splitMUBUFOffset(Imm, SOffset, ImmOffset, Alignment)) { in setBufferOffsets()
10022 Offsets[2] = DAG.getTargetConstant(ImmOffset, DL, MVT::i32); in setBufferOffsets()
10029 uint32_t SOffset, ImmOffset; in setBufferOffsets() local
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| H A D | SIInstrInfo.cpp | 9048 uint32_t &ImmOffset, Align Alignment) const { in splitMUBUFOffset() argument
9087 ImmOffset = Imm; in splitMUBUFOffset()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/X86/MCTargetDesc/ |
| H A D | X86MCCodeEmitter.cpp | 361 SmallVectorImpl<MCFixup> &Fixups, int ImmOffset = 0) const;
415 static bool isDispOrCDisp8(uint64_t TSFlags, int Value, int &ImmOffset) { in isDispOrCDisp8() argument
433 ImmOffset = CDisp8 - Value; in isDispOrCDisp8()
521 int ImmOffset) const { in emitImmediate()
528 emitConstant(DispOp.getImm() + ImmOffset, Size, CB); in emitImmediate()
541 assert(ImmOffset == 0); in emitImmediate()
551 ImmOffset = static_cast<int>(CB.size() - StartByte); in emitImmediate()
573 ImmOffset -= 4; in emitImmediate()
581 ImmOffset -= 2; in emitImmediate()
583 ImmOffset -= 1; in emitImmediate()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/PowerPC/ |
| H A D | PPCFrameLowering.cpp | 859 const int64_t ImmOffset = MFI.getObjectOffset(SaveIndex); in emitPrologue() local
860 assert((ImmOffset <= -8 && ImmOffset >= -512) && in emitPrologue()
862 assert(((ImmOffset & 0x7) == 0) && in emitPrologue()
866 .addImm(ImmOffset) in emitPrologue()
1866 const int64_t ImmOffset = MFI.getObjectOffset(SaveIndex); in emitEpilogue() local
1867 assert((ImmOffset <= -8 && ImmOffset >= -512) && in emitEpilogue()
1869 assert(((ImmOffset & 0x7) == 0) && in emitEpilogue()
1873 .addImm(ImmOffset) in emitEpilogue()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/ |
| H A D | AArch64ExpandPseudoInsts.cpp | 776 int ImmOffset = MI.getOperand(2).getImm() + Offset; in expandSVESpillFill() local
778 assert(ImmOffset >= -256 && ImmOffset < 256 && in expandSVESpillFill()
784 .addImm(ImmOffset); in expandSVESpillFill()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/ARM/ |
| H A D | ARMISelDAGToDAG.cpp | 4050 SDValue Base, RegOffset, ImmOffset; in Select() local
4053 SelectAddrMode3(Addr, Base, RegOffset, ImmOffset); in Select()
4062 SDValue Ops[] = {Base, RegOffset, ImmOffset, Chain}; in Select()
4079 SDValue Base, RegOffset, ImmOffset; in Select() local
4082 SelectAddrMode3(Addr, Base, RegOffset, ImmOffset); in Select()
4093 SDValue Ops[] = {SDValue(RegPair, 0), Base, RegOffset, ImmOffset, Chain}; in Select()
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