Home
last modified time | relevance | path

Searched refs:IdxVT (Results 1 – 9 of 9) sorted by relevance

/freebsd/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/
H A DFastISel.cpp390 EVT IdxVT = EVT::getEVT(Idx->getType(), /*HandleUnknown=*/false); in getRegForGEPIndex() local
391 if (IdxVT.bitsLT(PtrVT)) { in getRegForGEPIndex()
392 IdxN = fastEmit_r(IdxVT.getSimpleVT(), PtrVT, ISD::SIGN_EXTEND, IdxN); in getRegForGEPIndex()
393 } else if (IdxVT.bitsGT(PtrVT)) { in getRegForGEPIndex()
395 fastEmit_r(IdxVT.getSimpleVT(), PtrVT, ISD::TRUNCATE, IdxN); in getRegForGEPIndex()
H A DSelectionDAGBuilder.cpp4916 EVT IdxVT = Index.getValueType(); in visitMaskedScatter() local
4917 EVT EltTy = IdxVT.getVectorElementType(); in visitMaskedScatter()
4918 if (TLI.shouldExtendGSIndex(IdxVT, EltTy)) { in visitMaskedScatter()
4919 EVT NewIdxVT = IdxVT.changeVectorElementType(EltTy); in visitMaskedScatter()
5035 EVT IdxVT = Index.getValueType(); in visitMaskedGather() local
5036 EVT EltTy = IdxVT.getVectorElementType(); in visitMaskedGather()
5037 if (TLI.shouldExtendGSIndex(IdxVT, EltTy)) { in visitMaskedGather()
5038 EVT NewIdxVT = IdxVT.changeVectorElementType(EltTy); in visitMaskedGather()
6368 EVT IdxVT = Index.getValueType(); in visitVectorHistogram() local
6369 EVT EltTy = IdxVT.getVectorElementType(); in visitVectorHistogram()
[all …]
H A DLegalizeDAG.cpp5646 EVT IdxVT = Idx.getValueType(); in PromoteNode() local
5648 SDValue Factor = DAG.getConstant(NewEltsPerOldElt, SL, IdxVT); in PromoteNode()
5649 SDValue NewBaseIdx = DAG.getNode(ISD::MUL, SL, IdxVT, Idx, Factor); in PromoteNode()
5655 SDValue IdxOffset = DAG.getConstant(I, SL, IdxVT); in PromoteNode()
5656 SDValue TmpIdx = DAG.getNode(ISD::ADD, SL, IdxVT, NewBaseIdx, IdxOffset); in PromoteNode()
5693 EVT IdxVT = Idx.getValueType(); in PromoteNode() local
5696 SDValue Factor = DAG.getConstant(NewEltsPerOldElt, SDLoc(), IdxVT); in PromoteNode()
5697 SDValue NewBaseIdx = DAG.getNode(ISD::MUL, SL, IdxVT, Idx, Factor); in PromoteNode()
5704 SDValue IdxOffset = DAG.getConstant(I, SL, IdxVT); in PromoteNode()
5705 SDValue InEltIdx = DAG.getNode(ISD::ADD, SL, IdxVT, NewBaseIdx, IdxOffset); in PromoteNode()
H A DTargetLowering.cpp10115 EVT IdxVT = Idx.getValueType(); in clampDynamicVectorIndex() local
10125 DAG.getVScale(dl, IdxVT, APInt(IdxVT.getFixedSizeInBits(), NElts)); in clampDynamicVectorIndex()
10127 SDValue Sub = DAG.getNode(SubOpcode, dl, IdxVT, VS, in clampDynamicVectorIndex()
10128 DAG.getConstant(NumSubElts, dl, IdxVT)); in clampDynamicVectorIndex()
10129 return DAG.getNode(ISD::UMIN, dl, IdxVT, Idx, Sub); in clampDynamicVectorIndex()
10132 APInt Imm = APInt::getLowBitsSet(IdxVT.getSizeInBits(), Log2_32(NElts)); in clampDynamicVectorIndex()
10133 return DAG.getNode(ISD::AND, dl, IdxVT, Idx, in clampDynamicVectorIndex()
10134 DAG.getConstant(Imm, dl, IdxVT)); in clampDynamicVectorIndex()
10137 return DAG.getNode(ISD::UMIN, dl, IdxVT, Idx, in clampDynamicVectorIndex()
10138 DAG.getConstant(MaxIndex, dl, IdxVT)); in clampDynamicVectorIndex()
[all …]
/freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/
H A DAArch64FastISel.cpp4965 EVT IdxVT = EVT::getEVT(Idx->getType(), /*HandleUnknown=*/false); in getRegForGEPIndex() local
4966 if (IdxVT.bitsLT(PtrVT)) { in getRegForGEPIndex()
4967 IdxN = emitIntExt(IdxVT.getSimpleVT(), IdxN, PtrVT, /*isZExt=*/false); in getRegForGEPIndex()
4968 } else if (IdxVT.bitsGT(PtrVT)) in getRegForGEPIndex()
/freebsd/contrib/llvm-project/llvm/lib/Target/X86/
H A DX86InstrAVX512.td1612 X86VectorVTInfo _, X86VectorVTInfo IdxVT> {
1615 defm rr: AVX512_maskable_3src_cast<opc, MRMSrcReg, _, IdxVT, (outs _.RC:$dst),
1618 (_.VT (X86VPermt2 _.RC:$src2, IdxVT.RC:$src1, _.RC:$src3)), 1>,
1622 defm rm: AVX512_maskable_3src_cast<opc, MRMSrcMem, _, IdxVT, (outs _.RC:$dst),
1625 (_.VT (X86VPermt2 _.RC:$src2, IdxVT.RC:$src1,
1633 X86VectorVTInfo _, X86VectorVTInfo IdxVT> {
1636 defm rmb: AVX512_maskable_3src_cast<opc, MRMSrcMem, _, IdxVT, (outs _.RC:$dst),
1641 IdxVT.RC:$src1,(_.VT (_.BroadcastLdFrag addr:$src3)))), 1>,
1700 X86VectorVTInfo IdxVT,
1704 (IdxVT.VT (bitconvert
[all …]
H A DX86ISelLowering.cpp18236 MVT IdxVT = MVT::getVectorVT(IdxSVT, NumElts); in LowerINSERT_VECTOR_ELT() local
18237 if (!isTypeLegal(IdxSVT) || !isTypeLegal(IdxVT)) in LowerINSERT_VECTOR_ELT()
18241 SDValue IdxSplat = DAG.getSplatBuildVector(IdxVT, dl, IdxExt); in LowerINSERT_VECTOR_ELT()
18247 SDValue Indices = DAG.getBuildVector(IdxVT, dl, RawIndices); in LowerINSERT_VECTOR_ELT()
/freebsd/contrib/llvm-project/llvm/lib/Target/RISCV/
H A DRISCVISelLowering.cpp10501 MVT IdxVT = ConcatVT.changeVectorElementTypeToInteger(); in lowerVECTOR_DEINTERLEAVE() local
10504 DAG.getStepVector(DL, IdxVT, APInt(IdxVT.getScalarSizeInBits(), 2)); in lowerVECTOR_DEINTERLEAVE()
10507 DAG.getNode(ISD::ADD, DL, IdxVT, EvenIdx, DAG.getConstant(1, DL, IdxVT)); in lowerVECTOR_DEINTERLEAVE()
10572 MVT IdxVT = ConcatVT.changeVectorElementType(MVT::i16); in lowerVECTOR_INTERLEAVE() local
10575 SDValue StepVec = DAG.getStepVector(DL, IdxVT); in lowerVECTOR_INTERLEAVE()
10578 SDValue Ones = DAG.getSplatVector(IdxVT, DL, DAG.getConstant(1, DL, XLenVT)); in lowerVECTOR_INTERLEAVE()
10581 SDValue OddMask = DAG.getNode(ISD::AND, DL, IdxVT, StepVec, Ones); in lowerVECTOR_INTERLEAVE()
10583 DL, IdxVT.changeVectorElementType(MVT::i1), OddMask, in lowerVECTOR_INTERLEAVE()
10584 DAG.getSplatVector(IdxVT, DL, DAG.getConstant(0, DL, XLenVT)), in lowerVECTOR_INTERLEAVE()
10587 SDValue VLMax = DAG.getSplatVector(IdxVT, DL, computeVLMax(VecVT, DL, DAG)); in lowerVECTOR_INTERLEAVE()
[all …]
/freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/
H A DSIISelLowering.cpp7339 EVT IdxVT = Idx.getValueType(); in lowerEXTRACT_VECTOR_ELT() local
7342 SDValue IdxMask = DAG.getConstant(NElem / 2 - 1, SL, IdxVT); in lowerEXTRACT_VECTOR_ELT()
7343 SDValue NewIdx = DAG.getNode(ISD::AND, SL, IdxVT, Idx, IdxMask); in lowerEXTRACT_VECTOR_ELT()
13506 EVT IdxVT = Idx.getValueType(); in performInsertVectorEltCombine() local
13510 SDValue IC = DAG.getConstant(I, SL, IdxVT); in performInsertVectorEltCombine()