Searched refs:IdxLo (Results 1 – 3 of 3) sorted by relevance
| /freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
| H A D | AMDGPURegisterBankInfo.cpp | 2925 auto IdxLo = B.buildShl(S32, BaseIdxReg, One); in applyMappingImpl() local
2926 auto IdxHi = B.buildAdd(S32, IdxLo, One); in applyMappingImpl()
2928 auto Extract0 = B.buildExtractVectorElement(DstRegs[0], CastSrc, IdxLo); in applyMappingImpl()
2934 MRI.setRegBank(IdxLo.getReg(0), AMDGPU::SGPRRegBank); in applyMappingImpl()
2967 reinsertVectorIndexAdd(B, *IdxLo, 1, ConstOffset); in applyMappingImpl()
3038 auto IdxLo = B.buildShl(S32, BaseIdxReg, One); in applyMappingImpl() local
3039 auto IdxHi = B.buildAdd(S32, IdxLo, One); in applyMappingImpl()
3041 auto InsLo = B.buildInsertVectorElement(Vec32, CastSrc, InsRegs[0], IdxLo); in applyMappingImpl()
3056 MRI.setRegBank(IdxLo.getReg(0), AMDGPU::SGPRRegBank); in applyMappingImpl()
3084 reinsertVectorIndexAdd(B, *IdxLo, 1, ConstOffset); in applyMappingImpl()
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| /freebsd/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | LegalizeVectorTypes.cpp | 3375 unsigned IdxLo = 2 * i; in SplitVecRes_VECTOR_INTERLEAVE() local
3377 SetSplitVector(SDValue(N, i), Res[IdxLo / Factor].getValue(IdxLo % Factor), in SplitVecRes_VECTOR_INTERLEAVE()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/RISCV/ |
| H A D | RISCVISelLowering.cpp | 12074 unsigned IdxLo = 2 * i; in lowerVECTOR_INTERLEAVE() local
12077 Res[IdxLo / Factor].getValue(IdxLo % Factor), in lowerVECTOR_INTERLEAVE()
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