| /freebsd/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | LegalizeFloatTypes.cpp | 2441 EVT IVT = EVT::getIntegerVT(*DAG.getContext(), OpVT.getSizeInBits()); in PromoteFloatOp_BITCAST() local
2443 IVT, Promoted); in PromoteFloatOp_BITCAST()
2537 EVT IVT = EVT::getIntegerVT(*DAG.getContext(), VT.getSizeInBits()); in PromoteFloatOp_STORE() local
2541 IVT, Promoted); in PromoteFloatOp_STORE()
2555 EVT IVT = EVT::getIntegerVT(*DAG.getContext(), VT.getSizeInBits()); in PromoteFloatOp_ATOMIC_STORE() local
2558 DL, IVT, Promoted); in PromoteFloatOp_ATOMIC_STORE()
2560 return DAG.getAtomic(ISD::ATOMIC_STORE, DL, IVT, ST->getChain(), NewVal, in PromoteFloatOp_ATOMIC_STORE()
2689 EVT IVT = EVT::getIntegerVT(*DAG.getContext(), in PromoteFloatRes_BITCAST() local
2691 SDValue Cast = DAG.getBitcast(IVT, N->getOperand(0)); in PromoteFloatRes_BITCAST()
2701 EVT IVT = EVT::getIntegerVT(*DAG.getContext(), VT.getSizeInBits()); in PromoteFloatRes_ConstantFP() local
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| H A D | LegalizeDAG.cpp | 1572 EVT IVT = EVT::getIntegerVT(*DAG.getContext(), NumBits); in getSignAsIntValue() local
1574 if (TLI.isTypeLegal(IVT)) { in getSignAsIntValue()
1575 State.IntValue = DAG.getNode(ISD::BITCAST, DL, IVT, Value); in getSignAsIntValue()
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| /freebsd/stand/i386/btx/btx/ |
| H A D | btx.S | 274 lidt ivtdesc # Set IVT
577 lidt ivtdesc # Set IVT
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| /freebsd/contrib/llvm-project/llvm/lib/CodeGen/ |
| H A D | TargetLoweringBase.cpp | 1282 MVT IVT = (MVT::SimpleValueType)IntReg; in computeRegisterProperties() local
1283 if (isTypeLegal(IVT)) { in computeRegisterProperties()
1288 ValueTypeActions.setTypeAction(IVT, TypePromoteInteger); in computeRegisterProperties()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/NVPTX/ |
| H A D | NVPTXISelLowering.cpp | 5920 MVT IVT = MVT::getIntegerVT(VectorBits); in PerformEXTRACTCombine() local
5928 ISD::SRA, DL, IVT, DCI.DAG.getNode(ISD::BITCAST, DL, IVT, Vector), in PerformEXTRACTCombine()
5929 DCI.DAG.getConstant(Index->getZExtValue() * EltBits, DL, IVT))); in PerformEXTRACTCombine()
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| /freebsd/contrib/llvm-project/clang/lib/Sema/ |
| H A D | SemaInit.cpp | 1948 const VectorType *IVT = IType->castAs<VectorType>(); in CheckVectorType() local
1949 unsigned numIElts = IVT->getNumElements(); in CheckVectorType()
1955 IVT->getVectorKind()); in CheckVectorType()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/ARM/ |
| H A D | ARMISelLowering.cpp | 8095 MVT IVT = (FVT == MVT::f32) ? MVT::i32 : MVT::i16; in LowerBUILD_VECTOR() local
8097 Ops.push_back(DAG.getNode(ISD::BITCAST, dl, IVT, in LowerBUILD_VECTOR()
8099 EVT VecVT = EVT::getVectorVT(*DAG.getContext(), IVT, NumElts); in LowerBUILD_VECTOR()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/X86/ |
| H A D | X86ISelLowering.cpp | 7621 MVT IVT = in LowerBUILD_VECTORvXbf16() local
7627 SDValue Res = DAG.getNode(ISD::BUILD_VECTOR, SDLoc(), IVT, NewOps); in LowerBUILD_VECTORvXbf16()
18219 MVT IVT = VT.changeVectorElementTypeToInteger(); in LowerINSERT_VECTOR_ELT() local
18220 SDValue Res = DAG.getNode(ISD::INSERT_VECTOR_ELT, dl, IVT, in LowerINSERT_VECTOR_ELT()
18221 DAG.getBitcast(IVT, N0), in LowerINSERT_VECTOR_ELT()
28285 EVT IVT = VT.changeTypeToInteger(); in LowerFMINIMUM_FMAXIMUM() local
28377 SDValue XInt = DAG.getNode(ISD::BITCAST, DL, IVT, X); in LowerFMINIMUM_FMAXIMUM()
28378 SDValue ZeroCst = DAG.getConstant(0, DL, IVT); in LowerFMINIMUM_FMAXIMUM()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/RISCV/ |
| H A D | RISCVISelLowering.cpp | 4002 MVT IVT = VT.changeVectorElementType(MVT::i16); in lowerBUILD_VECTORvXf16()
4006 SDValue Res = DAG.getNode(ISD::BUILD_VECTOR, SDLoc(Op), IVT, NewOps); in lowerBUILD_VECTORvXf16()
4001 MVT IVT = VT.changeVectorElementType(MVT::i16); lowerBUILD_VECTORvXf16() local
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