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Searched refs:IMM (Results 1 – 17 of 17) sorted by relevance

/freebsd/contrib/llvm-project/compiler-rt/lib/builtins/arm/
H A Dudivmodsi4.S110 #define IMM # macro
113 cmp r0, r1, lsl IMM shift; \
115 WIDE(addhs) r3, r3, IMM (1 << shift); \
116 WIDE(subhs) r0, r0, r1, lsl IMM shift
H A Dumodsi3.S102 #define IMM # macro
105 cmp r0, r1, lsl IMM shift; \
107 WIDE(subhs) r0, r0, r1, lsl IMM shift
/freebsd/sys/contrib/libsodium/src/libsodium/crypto_stream/chacha20/dolbeau/
H A Du4.h2 #define VEC4_ROT(A, IMM) \ argument
3 _mm_or_si128(_mm_slli_epi32(A, IMM), _mm_srli_epi32(A, (32 - IMM)))
H A Du8.h2 #define VEC8_ROT(A, IMM) \ argument
3 _mm256_or_si256(_mm256_slli_epi32(A, IMM), _mm256_srli_epi32(A, (32 - IMM)))
/freebsd/sys/powerpc/powerpc/
H A Ddb_disasm.c866 u_int IMM; in disasm_fields() local
868 IMM = extract_field(instr, 31 - 31, 16); in disasm_fields()
869 if (IMM & 0x8000) { in disasm_fields()
871 IMM = 0x10000-IMM; in disasm_fields()
876 IMM = extract_field(instr, 31 - 31, 16); in disasm_fields()
880 APP_PSTR("0x%x", IMM); in disasm_fields()
/freebsd/contrib/llvm-project/llvm/lib/Target/CSKY/
H A DCSKYInstrFormats.td77 // Format< OP[6] | RZ[5] | RX[5] | IMM[16] >
91 // Format< OP[6] | SOP[5] | RZ[5] | IMM[16] >
141 // Format< OP[6] | SOP[5] | RX[5] | 00000000000000[14] | IMM[2] >
195 // Format< OP[6] | RZ[5] | RX[5] | SOP[4] | IMM[12] >
262 // Format< OP[6] | RZ[5] | RX[5] | SOP[6] | PCODE[5] | IMM[5]>
280 // Format< OP[6] | IMM[5] | RX[5] | SOP[6] | PCODE[5] | RZ[5]>
386 // Format< OP[6] | RY[5] | RX[5] | SOP[6] | PCODE[5] | IMM[5]>
469 // Format< OP[6] | IMM[5] | RX[5] | SOP[6] | PCODE[5] | 00000 >
486 // Format< OP[6] | IMM[5] | 00000[5] | SOP[6] | PCODE[5] | RZ[5]>
/freebsd/contrib/llvm-project/llvm/lib/Target/M68k/
H A DM68kInstrShiftRotate.td41 /// 1 1 1 0 | REG/IMM | D | SIZE |R/I| OP | REG
46 // REG/IMM
/freebsd/contrib/llvm-project/llvm/lib/Target/PowerPC/
H A DPPCInstrP10.td29 // * IMM - immediate (where signedness matters,
48 // The operand is an 8-bit immediate (IMM), the destination (XT)
306 // X-Form: [PO T IMM VRB XO TX]
312 bits<5> IMM;
316 let Inst{11-15} = IMM;
330 bits<8> IMM;
340 let Inst{24-31} = IMM;
526 bits<3> IMM;
535 let Inst{29-31} = IMM;
827 vsrc:$XC, u3imm:$IMM),
[all …]
H A DPPCInstrAltivec.td734 def VSPLTISB : VXForm_3<780, (outs vrrc:$VD), (ins s5imm:$IMM),
735 "vspltisb $VD, $IMM", IIC_VecPerm,
736 [(set v16i8:$VD, (v16i8 vecspltisb:$IMM))]>;
737 def VSPLTISH : VXForm_3<844, (outs vrrc:$VD), (ins s5imm:$IMM),
738 "vspltish $VD, $IMM", IIC_VecPerm,
739 [(set v8i16:$VD, (v8i16 vecspltish:$IMM))]>;
740 def VSPLTISW : VXForm_3<908, (outs vrrc:$VD), (ins s5imm:$IMM),
741 "vspltisw $VD, $IMM", IIC_VecPerm,
742 [(set v4i32:$VD, (v4i32 vecspltisw:$IMM))]>;
846 let IMM=-1 in {
H A DPPCInstrFormats.td2087 bits<5> IMM;
2092 let Inst{11-15} = IMM;
H A DPPCInstrVSX.td3917 def : Pat<(v4i32 (int_ppc_vsx_xxinsertw v4i32:$A, v2i64:$B, imm:$IMM)),
3918 (v4i32 (XXINSERTW $A, $B, imm:$IMM))>;
3919 def : Pat<(v2i64 (int_ppc_vsx_xxextractuw v2i64:$A, imm:$IMM)),
3920 (v2i64 (COPY_TO_REGCLASS (XXEXTRACTUW $A, imm:$IMM), VSRC))>;
/freebsd/contrib/llvm-project/llvm/lib/Target/SystemZ/
H A DSystemZPatterns.td40 // respectively. MODE is the addressing mode and IMM is the type
49 // memory location. IMM is the type of the second operand.
/freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/
H A DSMInstructions.td886 // 1. IMM offset
891 // 2. 32-bit IMM offset on CI
910 // 4. SGPR+IMM offset
947 // 2. 32-bit IMM offset on CI
979 // 1. IMM offset
993 // 3. SGPR+IMM offset
/freebsd/contrib/llvm-project/llvm/lib/Target/ARM/
H A DARMScheduleR52.td298 (instregex "LD(RB|R)(_|T_)(POST|PRE)_(IMM|REG)", "LDRH(_PRE|_POST)",
299 "LDRBT_POST$", "LDR(T|BT)_POST_(REG|IMM)", "LDRHT(i|r)",
H A DARMScheduleSwift.td366 (instregex "LD(RB|R)(_|T_)(POST|PRE)_(IMM|REG)", "LDRH(_PRE|_POST)",
367 "LDR(T|BT)_POST_(REG|IMM)", "LDRHT(i|r)",
/freebsd/sys/cddl/dev/dtrace/x86/
H A Ddis_tables.c6528 enum {IMM, DISP}; enumerator
6653 IMM, TRY_NEG) && in dtrace_disx86_str()
6718 IMM, POS); in dtrace_disx86_str()
/freebsd/contrib/llvm-project/llvm/lib/Target/NVPTX/
H A DNVPTXIntrinsics.td1540 Operand IMMType, SDNode IMM, list<Predicate> Pred> {
1547 [(set (regT regclass:$dst), (IntOp (ptrT ptrclass:$addr), IMM:$b))]>,
1551 string OpcStr, PatFrag IntOp, Operand IMMType, SDNode IMM,
1554 IntOp, IMMType, IMM, Pred>;
1556 IntOp, IMMType, IMM, Pred>;