| /freebsd/contrib/llvm-project/llvm/tools/llvm-mca/ |
| H A D | CodeRegionGenerator.h | 68 InstrumentManager &IM; variable 72 InstrumentManager &IM) in InstrumentRegionCommentConsumer() argument 73 : SM(SM), Regions(R), IM(IM) {} in InstrumentRegionCommentConsumer() 82 InstrumentManager &getInstrumentManager() { return IM; } in getInstrumentManager() 120 InstrumentManager &IM; variable 124 InstrumentManager &IM) in InstrumentMCStreamer() argument 125 : MCStreamerWrapper(Context, R), IM(IM) {} in InstrumentMCStreamer() 132 for (UniqueInstrument &I : IM.createInstruments(Inst)) { in emitInstruction() 254 InstrumentManager &IM) in AsmInstrumentRegionGenerator() argument 256 CC(SM, Regions, IM), Streamer(Ctx, Regions, IM) {} in AsmInstrumentRegionGenerator()
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| H A D | CodeRegionGenerator.cpp | 141 if (IM.shouldIgnoreInstruments()) in HandleComment() 147 if (!IM.supportsInstrumentType(InstrumentKind)) { in HandleComment() 160 UniqueInstrument I = IM.createInstrument(InstrumentKind, Data); in HandleComment()
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| H A D | llvm-mca.cpp | 512 std::unique_ptr<mca::InstrumentManager> IM; in main() local 514 IM = std::unique_ptr<mca::InstrumentManager>( in main() 517 if (!IM) { in main() 520 IM = std::make_unique<mca::InstrumentManager>(*STI, *MCII); in main() 530 *MCII, *IM); in main() 593 mca::InstrBuilder IB(*STI, *MCII, *MRI, MCIA.get(), *IM, CallLatency); in main() 701 shouldPrintInstructionTables(InstructionTablesType::FULL), *IM, in main() 781 ShowBarriers, /*ShouldPrintFullInfo=*/false, *IM, InstToInstruments)); in main()
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| /freebsd/contrib/llvm-project/llvm/tools/llvm-mca/Views/ |
| H A D | InstructionInfoView.h | 62 const InstrumentManager &IM; variable 96 const InstrumentManager &IM, in InstructionInfoView() argument 101 LoweredInsts(LoweredInsts), IM(IM), in InstructionInfoView()
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| H A D | InstructionInfoView.cpp | 203 : IM.getSchedClassID(MCII, Inst, IVecIt->second); in collectData()
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| /freebsd/contrib/llvm-project/llvm/include/llvm/ADT/ |
| H A D | IntervalMap.h | 1792 IntervalMap &IM = *this->map; in insertNode() local 1797 if (IM.rootSize < RootBranch::Capacity) { in insertNode() 1798 IM.rootBranch().insert(P.offset(0), IM.rootSize, Node, Stop); in insertNode() 1799 P.setSize(0, ++IM.rootSize); in insertNode() 1806 IdxPair Offset = IM.splitRoot(P.offset(0)); in insertNode() 1807 P.replaceRoot(&IM.rootBranch(), IM.rootSize, Offset); in insertNode() 1837 IntervalMap &IM = *this->map; in insert() local 1841 unsigned Size = IM.rootLeaf().insertFrom(P.leafOffset(), IM.rootSize, a, b, y); in insert() 1845 P.setSize(0, IM.rootSize = Size); in insert() 1850 IdxPair Offset = IM.branchRoot(P.leafOffset()); in insert() [all …]
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| /freebsd/contrib/llvm-project/llvm/utils/TableGen/ |
| H A D | GlobalISelCombinerMatchTableEmitter.cpp | |
| H A D | GlobalISelCombinerEmitter.cpp | 87 void declareInstExpansion(CodeExpansions &CE, const InstructionMatcher &IM, in declareInstExpansion() argument 89 CE.declare(Name, "State.MIs[" + to_string(IM.getInsnVarID()) + "]"); in declareInstExpansion() 727 InstructionMatcher *IM, 760 InstructionMatcher &IM, const CodeGenInstructionPattern &P, 1074 auto &IM = *std::prev(M.insnmatchers().end()); in addCXXPredicate() local 1083 IM->addPredicate<GenericInstructionPredicateMatcher>( in addCXXPredicate() 1591 InstructionMatcher &IM = M.addInstructionMatcher(IP.getName()); in emitMatchPattern() local 1592 declareInstExpansion(CE, IM, IP.getName()); in emitMatchPattern() 1601 if (!emitCodeGenInstructionMatchPattern(CE, Alts, M, IM, *CGP, SeenPats, in emitMatchPattern() 1610 if (!emitPatFragMatchPattern(CE, Alts, M, &IM, *PFP, SeenPats)) in emitMatchPattern() [all …]
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| /freebsd/sys/contrib/device-tree/Bindings/display/ |
| H A D | multi-inno,mi0283qt.txt | 11 the panel interface mode (IM[3:0] pins): 12 - present: IM=x110 4-wire 8-bit data serial interface 13 - absent: IM=x101 3-wire 9-bit data serial interface
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| /freebsd/contrib/netbsd-tests/lib/libm/ |
| H A D | t_casinh.c | 16 #define IM(z) (((double *)(&z))[1]) macro 68 IM(input) = values[i].input_im; in ATF_TC_BODY() 70 IM(result) = values[i].result_im; in ATF_TC_BODY()
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| /freebsd/sys/contrib/device-tree/src/arm/arm/ |
| H A D | integratorap-im-pd1.dts | 4 * with the IM-PD1 example logical module mounted. 10 model = "ARM Integrator/AP with IM-PD1"; 19 /* 1 MB of designated video RAM on the IM-PD1 */ 42 clock-output-names = "IM-PD1-VCO1"; 52 clock-output-names = "IM-PD1-VCO2"; 85 /* Push buttons on the IM-PD1 */
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| /freebsd/contrib/llvm-project/clang/lib/AST/ByteCode/ |
| H A D | Pointer.cpp | 429 InitMapPtr &IM = getInitMap(); in isInitialized() local 431 if (!IM) in isInitialized() 434 if (IM->first) in isInitialized() 437 return IM->second->isElementInitialized(getIndex()); in isInitialized() 471 InitMapPtr &IM = getInitMap(); in initialize() local 472 if (!IM) in initialize() 473 IM = in initialize() 476 assert(IM); in initialize() 479 if (IM->first) in initialize() 482 if (IM->second->initializeElement(getIndex())) { in initialize() [all …]
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| /freebsd/contrib/llvm-project/llvm/lib/Target/Mips/ |
| H A D | MipsDelaySlotFiller.cpp | 250 InspectMemInstr &IM) const; 256 RegDefsUses &RegDU, InspectMemInstr &IM, Iter Slot, 689 InspectMemInstr &IM, Iter Slot, in searchRange() argument 726 if (delayHasHazard(*CurrI, RegDU, IM)) in searchRange() 840 std::unique_ptr<InspectMemInstr> IM; in searchSuccBBs() local 856 IM.reset(new LoadFromStackOrConst()); in searchSuccBBs() 859 IM.reset(new MemDefsUses(&MFI)); in searchSuccBBs() 862 if (!searchRange(MBB, SuccBB->begin(), SuccBB->end(), RegDU, *IM, Slot, in searchSuccBBs() 951 InspectMemInstr &IM) const { in delayHasHazard() 957 HasHazard |= IM.hasHazard(Candidate); in delayHasHazard()
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| /freebsd/contrib/llvm-project/llvm/include/llvm/MCA/ |
| H A D | InstrBuilder.h | 68 const InstrumentManager &IM; variable 105 const InstrumentManager &IM, unsigned CallLatency);
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| /freebsd/contrib/llvm-project/llvm/lib/Transforms/Vectorize/ |
| H A D | LoadStoreVectorizer.cpp | 212 Instruction *IM = dyn_cast<Instruction>(IW->getOperand(Idx)); in reorder() local 213 if (!IM || IM->getOpcode() == Instruction::PHI) in reorder() 218 if (IM->getParent() != I->getParent()) in reorder() 221 assert(IM != I && "Unexpected cycle while re-ordering instructions"); in reorder() 223 if (!IM->comesBefore(I)) { in reorder() 224 InstructionsToMove.insert(IM); in reorder() 225 Worklist.emplace_back(IM); in reorder() 232 Instruction *IM = &*(BBI++); in reorder() local 233 if (!InstructionsToMove.contains(IM)) in reorder() 235 IM->moveBefore(I->getIterator()); in reorder()
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| /freebsd/contrib/llvm-project/llvm/include/llvm/CodeGen/ |
| H A D | SlotIndexes.h | 491 [](const IdxMBBPair &IM, SlotIndex Idx) { return IM.first < Idx; }); in getMBBLowerBound() 502 [](SlotIndex Idx, const IdxMBBPair &IM) { return Idx < IM.first; }); in getMBBUpperBound()
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| /freebsd/crypto/openssl/test/certs/ |
| H A D | server-pss-restrict-cert.pem | 19 /vDI5hPj9RHvjjta6FQx140wA6c8ZB59x9YIv1alJWf6s3+TM8bv70L/aBBT8+IM
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| /freebsd/contrib/llvm-project/llvm/lib/CodeGen/ |
| H A D | TargetLoweringBase.cpp | 759 for (unsigned IM = (unsigned)ISD::PRE_INC; in initActions() local 760 IM != (unsigned)ISD::LAST_INDEXED_MODE; ++IM) { in initActions() 762 setIndexedLoadAction(IM, VT, Expand); in initActions() 763 setIndexedStoreAction(IM, VT, Expand); in initActions() 764 setIndexedMaskedLoadAction(IM, VT, Expand); in initActions() 765 setIndexedMaskedStoreAction(IM, VT, Expand); in initActions() 780 for (unsigned IM = (unsigned)ISD::PRE_INC; in initActions() local 781 IM != (unsigned)ISD::LAST_INDEXED_MODE; ++IM) { in initActions() 782 setIndexedLoadAction(IM, VT, Expand); in initActions() 783 setIndexedStoreAction(IM, VT, Expand); in initActions() [all …]
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| /freebsd/libexec/getty/ |
| H A D | main.c | 318 if (IM && *IM && !(PL && PP)) in main() 319 putf(IM); in main()
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| H A D | gettytab.h | 61 #define IM gettystrs[2].value macro
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| /freebsd/crypto/heimdal/appl/telnet/telnetd/ |
| H A D | telnetd.c | 829 char *IM; in my_telnet() local 977 IM = DEFAULT_IM; in my_telnet() 980 if (hostinfo && *IM) in my_telnet() 981 putf(IM, ptyibuf2); in my_telnet()
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| /freebsd/contrib/llvm-project/clang/lib/AST/ |
| H A D | MicrosoftMangle.cpp | 729 MSInheritanceModel IM = RD->getMSInheritanceModel(); in mangleMemberDataPointer() local 738 if (IM == MSInheritanceModel::Virtual) in mangleMemberDataPointer() 747 switch (IM) { in mangleMemberDataPointer() 772 if (inheritanceModelHasVBPtrOffsetField(IM)) in mangleMemberDataPointer() 774 if (inheritanceModelHasVBTableOffsetField(IM)) in mangleMemberDataPointer() 780 MSInheritanceModel IM = RD->getMSInheritanceModel(); in mangleMemberDataPointerInClassNTTP() local 785 if (IM != MSInheritanceModel::Single && IM != MSInheritanceModel::Multiple) in mangleMemberDataPointerInClassNTTP() 814 MSInheritanceModel IM = RD->getMSInheritanceModel(); in mangleMemberFunctionPointer() local 817 switch (IM) { in mangleMemberFunctionPointer() 858 if (VBTableOffset == 0 && IM == MSInheritanceModel::Virtual) in mangleMemberFunctionPointer() [all …]
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| /freebsd/contrib/llvm-project/llvm/lib/Transforms/Scalar/ |
| H A D | DeadStoreElimination.cpp | 317 auto &IM = IOL[DeadI]; in isPartialOverwrite() local 332 auto ILI = IM.lower_bound(KillingIntStart); in isPartialOverwrite() 333 if (ILI != IM.end() && ILI->second <= KillingIntEnd) { in isPartialOverwrite() 339 ILI = IM.erase(ILI); in isPartialOverwrite() 347 while (ILI != IM.end() && ILI->second <= KillingIntEnd) { in isPartialOverwrite() 350 ILI = IM.erase(ILI); in isPartialOverwrite() 354 IM[KillingIntEnd] = KillingIntStart; in isPartialOverwrite() 356 ILI = IM.begin(); in isPartialOverwrite()
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| /freebsd/contrib/llvm-project/llvm/lib/MCA/ |
| H A D | InstrBuilder.cpp | 36 : STI(sti), MCII(mcii), MRI(mri), MCIA(mcia), IM(im), FirstCallInst(true), in InstrBuilder() 572 unsigned SchedClassID = IM.getSchedClassID(MCII, MCI, IVec); in createInstrDescImpl() 652 unsigned SchedClassID = IM.getSchedClassID(MCII, MCI, IVec); in getOrCreateInstrDesc()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/Hexagon/ |
| H A D | HexagonFrameLowering.cpp | 2374 HexagonBlockRanges::InstrIndexMap &IM = F->second; in optimizeSpillSlots() local 2375 HexagonBlockRanges::RegToRangeMap LM = HBR.computeLiveMap(IM); in optimizeSpillSlots() 2376 HexagonBlockRanges::RegToRangeMap DM = HBR.computeDeadMap(IM, LM); in optimizeSpillSlots() 2390 MachineInstr &SI = *IM.getInstr(Range.start()); in optimizeSpillSlots() 2391 MachineInstr &EI = *IM.getInstr(Range.end()); in optimizeSpillSlots() 2400 Register FoundR = this->findPhysReg(MF, Range, IM, DM, RC); in optimizeSpillSlots() 2435 IM.replaceInstr(&SI, CopyIn); in optimizeSpillSlots() 2460 IM.replaceInstr(&MI, CopyOut); in optimizeSpillSlots()
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